New gate-bias voltage-generating technique with threshold-voltage compensation for on-glass analog circuits in LTPS process

IEEE/OSA Journal of Display Technology

Volumn 3, Issue 3, 2007, Pages 309-314

  Chen, Jung Sheng ^a,b   Ker, Ming Dou ^a,b  

^a IEEE

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Analog circuit; Biasing circuit; Low temperature polycrystalline silicon (LTPS); Thin film transistor (TFT); Threshold voltage compensation; Threshold voltage variation

Indexed keywords

ANALOG CIRCUITS; POLYSILICON; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

BIASING CIRCUITS; LOW TEMPERATURE POLYCRYSTALLINE SILICON (LTPS); THRESHOLD VOLTAGE COMPENSATION; THRESHOLD VOLTAGE VARIATIONS;

THIN FILM TRANSISTORS;

EID: 34548090274     PISSN: 1551319X     EISSN: None     Source Type: Journal    
DOI: 10.1109/JDT.2007.900916     Document Type: Article

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