A single chip H.264/AVC HDTV encoder/decoder/transcoder system LSI

Digest of Technical Papers - IEEE International Conference on Consumer Electronics

Volumn , Issue , 2007, Pages

  Mizosoe, Hiroki ^a   Yoshida, Daisuke ^a   Nakamura, Taku ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

IMAGE CODING; IMAGING SYSTEMS; LSI CIRCUITS; MICROPROCESSOR CHIPS; THREE DIMENSIONAL COMPUTER GRAPHICS;

CHIP INTEGRATION; DIGITAL CONSUMER APPLICATION; FLEXIBLE CODEC ARCHITECTURE;

HIGH DEFINITION TELEVISION;

EID: 34548019231     PISSN: 0747668X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCE.2007.341386     Document Type: Conference Paper

References (5)

1. ISO/IEC 14496-10: International Standard, Part 10: Advanced video coding, 2003.
2. ISO/IEC 13818-2: International Standard, Video, 2000.
3. D. Marpe, H. Schwarz and T. Wiegand, "Context-Based Adaptive Binary Arithmetic Coding in the H.264/AVC Video Compression Standard," IEEE Trans. on Circuits and Systems for Video Technology, Vol. 13, 7, July 200.3.
4. Y. Yatabe et al., "An MPEG2/4 dual codec with sharing motion estimation," IEEE Trans. on Consumer Electronics, Vol. 51, 2, May 2005.
5. H. Mizosoe et al., "An advanced multimedia processing LSI suitable for HDTV applications," IEEE Trans. on Consumer Electronics, Vol. 47, 3, Aug. 2001.