A 5-bit 1-GS/s flash-ADC in 0.13-μm CMOS using active interpolation

ESSCIRC 2006 - Proceedings of the 32nd European Solid-State Circuits Conference

Volumn , Issue , 2006, Pages 412-415

  Viitala, Olli ^a   Lindfors, Saska ^a   Halonen, Kari ^a  

^a AALTO UNIVERSITY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE INTERPOLATION TOPOLOGY; INPUT CAPACITANCE; SFDR;

BIT ERROR RATE; CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; ELECTRIC POWER UTILIZATION; INTERPOLATION;

ANALOG TO DIGITAL CONVERSION;

EID: 34547993182     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIR.2006.307618     Document Type: Conference Paper

References (7)