A PRNG circuit on PLD with feature of low-power, high-speed, and various generation of random number sequence

IEEE Region 10 Annual International Conference, Proceedings/TENCON

Volumn , Issue , 2006, Pages

  Sato, Tomoaki ^a   Kikuchi, Kazuhira ^a   Fukase, Masa Aki ^a  

^a HIROSAKI UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POWER UTILIZATION; GATES (TRANSISTOR); RANDOM NUMBER GENERATION; SEQUENTIAL CIRCUITS;

PROGRAMMABLE LOGIC DEVICES (PLD); RANDOM NUMBER GENERATORS; RANDOM NUMBER SEQUENCES;

PROGRAMMABLE LOGIC CONTROLLERS;

EID: 34547560532     PISSN: 21593442     EISSN: 21593450     Source Type: Conference Proceeding    
DOI: 10.1109/TENCON.2006.343789     Document Type: Conference Paper

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