Efficient pattern mining on shared memory systems: Implications for chip multiprocessor architectures

Proceedings of the 2006 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, MSPC 2006

Volumn , Issue , 2006, Pages 31-40

  Buehrer, Gregory ^a   Chen, Yen Kuang ^b   Parthasarathy, Srinivasan ^a   Nguyen, Anthony ^b   Ghoting, Amol ^a   Kim, Daehyun ^b  

^a OHIO STATE UNIVERSITY   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MEMORY HIERARCHY; SHARED MEMORY MULTIPROCESSOR SYSTEM;

DATA REDUCTION; MULTIPROCESSING SYSTEMS; NETWORK ARCHITECTURE; QUEUEING NETWORKS; TELECOMMUNICATION LINKS; WEB SERVICES;

DATA MINING;

EID: 34547507661     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1178597.1178603     Document Type: Conference Paper

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