RSFQ asynchronous switch matrix

IEEE Transactions on Applied Superconductivity

Volumn 17, Issue 2, 2007, Pages 505-507

  Kirichenko, Alex ^a   Gupta, Deepnarayan ^a   Sarwana, Saad ^a  

^a HYPRES INC   (United States)

Author keywords

DSP; Network switch; RSFQ

Indexed keywords

BANDWIDTH; CHANNEL CAPACITY; DATA TRANSFER; SIGNAL RECEIVERS;

DSP; MULTI RATE DIGITAL DATA STREAMS; NETWORK SWITCH; RSFQ;

SWITCHING SYSTEMS;

EID: 34547466763     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2007.898737     Document Type: Conference Paper

References (4)

1. K. K. Likharev and V. K. Semenov, "RSFQ logic/memory family," IEEE Trans. Appl. Supercond., vol. 1, pp. 3-28, March 1991.
2. 2 The process flow and design, rules are available online [Online]. Available: http://www.hypres.com/
3. [Online]. Available: http://www.pavel.physics.sunysb.edu/RSFQ/Research/ octopus.html
4. O. A. Mukhanov et al, "High-resolution ADC operation up to 19.6 GHz clock frequency," Supercond. Sci. Technol., vol. 14, pp. 1065-1070, 2001.