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Volumn , Issue , 2006, Pages 321-322

Intrinsic hardware evolution of neural networks in reconfigurable analogue and digital devices

Author keywords

[No Author keywords available]

Indexed keywords


EID: 34547454379     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2006.53     Document Type: Conference Paper
Times cited : (17)

References (5)
  • 2
    • 16244376375 scopus 로고    scopus 로고
    • Feasibility of floating-point arithmetic in FPGA based artificial neural networks
    • Nov
    • S. Arebi, K. Nichols, M. Moussa. Feasibility of floating-point arithmetic in FPGA based artificial neural networks." In CAINE'02, pages 8-14. Nov 2002.
    • (2002) CAINE'02 , pp. 8-14
    • Arebi, S.1    Nichols, K.2    Moussa, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.