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Volumn , Issue , 2006, Pages 195-204

Systematic characterization of programmable packet processing pipelines

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); NETWORK PROTOCOLS; PACKET SWITCHING; PROGRAMMABLE LOGIC CONTROLLERS; RESOURCE ALLOCATION;

EID: 34547444615     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2006.67     Document Type: Conference Paper
Times cited : (4)

References (9)
  • 1
    • 0002842254 scopus 로고
    • Systolic arrays for VLSI
    • I. S. Duff and G. W. Stewart, Eds, Knoxville, TN, Society for Industrial and Applied Mathematics SIAM
    • H. T. Kung and Charles E. Leiserson, "Systolic arrays for VLSI," in Sparse Matrix Proceedings 1978, I. S. Duff and G. W. Stewart, Eds., Knoxville, TN, 1979, pp. 256-282, Society for Industrial and Applied Mathematics (SIAM).
    • (1979) Sparse Matrix Proceedings 1978 , pp. 256-282
    • Kung, H.T.1    Leiserson, C.E.2
  • 2
    • 84937641774 scopus 로고
    • First version of a data flow procedure language
    • G. Goos and J. Hartmanis, Eds, Springer-Verlag
    • Jack Dennis, "First version of a data flow procedure language," in Lecture Notes in Computer Science, G. Goos and J. Hartmanis, Eds. 1974, pp. 362-376, Springer-Verlag.
    • (1974) Lecture Notes in Computer Science , pp. 362-376
    • Dennis, J.1
  • 3
    • 0000087207 scopus 로고
    • The semantics of a simple language for parallel programming
    • J. L. Rosenfeld, Ed, Stockholm, Sweden, Aug, North Holland, Amsterdam
    • Gilles Kahn, "The semantics of a simple language for parallel programming," in Information processing, J. L. Rosenfeld, Ed., Stockholm, Sweden, Aug. 1974, pp. 471-475, North Holland, Amsterdam.
    • (1974) Information processing , pp. 471-475
    • Kahn, G.1
  • 8
    • 4444277415 scopus 로고    scopus 로고
    • Mapping a domain specific language to a platform FPGA
    • San Diego, CA, June
    • Chidamber Kulkarni, Gordon Brebner, and Graham Schelle, "Mapping a domain specific language to a platform FPGA," in IEEE Design Automation Conference, (DAC), San Diego, CA, June 2004, pp. 924-927.
    • (2004) IEEE Design Automation Conference, (DAC) , pp. 924-927
    • Kulkarni, C.1    Brebner, G.2    Schelle, G.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.