Calculating state spaces of hierarchical Petri nets using BDD

Design of Embedded Control Systems

Volumn , Issue , 2005, Pages 85-94

  Miczulski, Piotr ^a  

^a UNIVERSITY OF ZIELONA GÓRA   (Poland)

Author keywords

binary decision diagram; connected system of binary decision diagrams; hierarchical Petri nets; state space calculation algorithm

Indexed keywords

EID: 34547377996     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/0-387-28327-7_8     Document Type: Chapter

References (6)

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2. E. Pastor, O. Roig, J. Cortadella, M. R. Badia, Application and theory of Petri nets. In: Proceedings of15th InternationalConference, LectureNotesin Computer Science, Vol. 815, Petri Net Analysis Using Boolean Manipulation. Springer-Verlang (1994).
3. K. Biliński, Application of Petri nets in parallel controller design. PhD. Thesis, University of Bristol (1996).
4. M. Wẽgrzyn, Hierarchical implementation of concurrent logic controllers by means of FPGAs. PhD. Thesis, Warsaw University of Technology (1998).
5. R. Drechsler, Binary Decision Diagram. Theory and Implementation. Kluwer Academic Publishers, pp. 9-30 (1998).
6. S. Minato, Binary Decision Diagrams and Applications for VLSI CAD. Kluwer Academic Publishers, pp. 9-22 (1996).