-
1
-
-
27344435504
-
The design and implementation of a first-generation CELL processor
-
IEEE Computer Society Press: Los Alamitos, CA
-
Pham D et al. The design and implementation of a first-generation CELL processor. Proceedings of the 2005 IEEE International Solid-State Circuits Conference. IEEE Computer Society Press: Los Alamitos, CA, 2005; 184-185.
-
(2005)
Proceedings of the 2005 IEEE International Solid-State Circuits Conference
, pp. 184-185
-
-
Pham, D.1
-
3
-
-
25844503119
-
Introduction to the Cell multiprocessor
-
Kahle JA, Day MN, Hofstee HP, Johns CR, Maeurer TR, Shippy D. Introduction to the Cell multiprocessor. IBM Journal of Research and Development 2005; 49(4/5):589-604.
-
(2005)
IBM Journal of Research and Development
, vol.49
, Issue.4-5
, pp. 589-604
-
-
Kahle, J.A.1
Day, M.N.2
Hofstee, H.P.3
Johns, C.R.4
Maeurer, T.R.5
Shippy, D.6
-
4
-
-
34547373528
-
-
IBM. Cell Broadband Engine Architecture, Version 1.0, August 2005
-
IBM. Cell Broadband Engine Architecture, Version 1.0, August 2005.
-
-
-
-
5
-
-
28244473720
-
A fully-pipelined single-precision floating point unit in the synergistic processor element of a CELL processor
-
IEEE Computer Society Press: Los Alamitos, CA
-
Oh H et al. A fully-pipelined single-precision floating point unit in the synergistic processor element of a CELL processor. Proceedings of the 2005 IEEE Symposium on VLSI Circuits, 2005. IEEE Computer Society Press: Los Alamitos, CA, 2005; 24-27.
-
(2005)
Proceedings of the 2005 IEEE Symposium on VLSI Circuits
, pp. 24-27
-
-
Oh, H.1
-
6
-
-
25844514370
-
A double-precision multiplier with fine-grained clock-gating support for a first-generation CELL processor
-
IEEE Computer Society Press: Los Alamitos, CA
-
Kuang JB, Buchholtz TC, Dance SM, Warnock JD, Storino SN, Wendel D, Bradley DH. A double-precision multiplier with fine-grained clock-gating support for a first-generation CELL processor. Proceedings of the 2005 IEEE International Solid-State Circuits Conference. IEEE Computer Society Press: Los Alamitos, CA, 2005; 378-379.
-
(2005)
Proceedings of the 2005 IEEE International Solid-State Circuits Conference
, pp. 378-379
-
-
Kuang, J.B.1
Buchholtz, T.C.2
Dance, S.M.3
Warnock, J.D.4
Storino, S.N.5
Wendel, D.6
Bradley, D.H.7
-
8
-
-
28244471705
-
The circuits and physical design of the synergistic processor element of a CELL processor
-
IEEE Computer Society Press: Los Alamitos, CA
-
Takahashi O et al. The circuits and physical design of the synergistic processor element of a CELL processor. Proceedings of the 2005 IEEE Symposium on VLSI Circuits, 2005. IEEE Computer Society Press: Los Alamitos, CA, 2005; 20-23.
-
(2005)
Proceedings of the 2005 IEEE Symposium on VLSI Circuits
, pp. 20-23
-
-
Takahashi, O.1
-
10
-
-
34548206782
-
Exploiting the performance of 32 bit floating point arithmetic in obtaining 64 bit accuracy
-
IEEE Computer Society Press: Los Alamitos, CA
-
Langou J, Langou J, Luszczek P, Kurzak J, Buttari A, Dongarraa JJ. Exploiting the performance of 32 bit floating point arithmetic in obtaining 64 bit accuracy. Proceedings of the 2006 ACM/IEEE Conference on Supercomputing (SC '06). IEEE Computer Society Press: Los Alamitos, CA, 2006.
-
(2006)
Proceedings of the 2006 ACM/IEEE Conference on Supercomputing (SC '06)
-
-
Langou, J.1
Langou, J.2
Luszczek, P.3
Kurzak, J.4
Buttari, A.5
Dongarraa, J.J.6
-
11
-
-
0042674307
-
The LINPACK benchmark: Past, present and future
-
Dongarra JJ, Luszczek P, Petitet A. The LINPACK benchmark: Past, present and future. Concurrency and Computation: Practice and Experience 2003; 15(9):803-820.
-
(2003)
Concurrency and Computation: Practice and Experience
, vol.15
, Issue.9
, pp. 803-820
-
-
Dongarra, J.J.1
Luszczek, P.2
Petitet, A.3
-
12
-
-
28144451154
-
A 4.8 GHz fully pipelined embedded SRAM in the streaming processor of a CELL processor
-
IEEE Computer Society Press: Los Alamitos, CA
-
Dhong SH, Takahashi O, White M, Asano T, Nakazato T, Silberman J, Kawasumi A, Yoshihara H. A 4.8 GHz fully pipelined embedded SRAM in the streaming processor of a CELL processor. Proceedings of the IEEE International Solid-State Circuits Conference. IEEE Computer Society Press: Los Alamitos, CA, 2005; 486-487.
-
(2005)
Proceedings of the IEEE International Solid-State Circuits Conference
, pp. 486-487
-
-
Dhong, S.H.1
Takahashi, O.2
White, M.3
Asano, T.4
Nakazato, T.5
Silberman, J.6
Kawasumi, A.7
Yoshihara, H.8
-
14
-
-
34547284690
-
-
Basic Linear Algebra Technical Forum. Basic Linear Algebra Technical Forum Standard, August 2001.
-
Basic Linear Algebra Technical Forum. Basic Linear Algebra Technical Forum Standard, August 2001.
-
-
-
-
15
-
-
0004270323
-
A Fortran-to-C converter
-
149, AT&T Bell Laboratories
-
Feldman SI, Gay DM, Maimone MW, Schryerr NL. A Fortran-to-C converter. Computing Science Technical Report 149, AT&T Bell Laboratories, 1990.
-
(1990)
Computing Science Technical Report
-
-
Feldman, S.I.1
Gay, D.M.2
Maimone, M.W.3
Schryerr, N.L.4
-
16
-
-
0343462141
-
Automated empirical optimizations of software and the ATLAS project
-
Whaley RC, Petitet A, Dongarra JJ. Automated empirical optimizations of software and the ATLAS project. Parallel Computing 2001; 27(1-2):3-35.
-
(2001)
Parallel Computing
, vol.27
, Issue.1-2
, pp. 3-35
-
-
Whaley, R.C.1
Petitet, A.2
Dongarra, J.J.3
-
17
-
-
1542392269
-
On reducing TLB misses in matrix multiplication
-
Technical Report TR-02-55, Department of Computer Sciences, University of Texas at Austin
-
Goto K, van de Geijn R. On reducing TLB misses in matrix multiplication. Technical Report TR-02-55, Department of Computer Sciences, University of Texas at Austin, 2002.
-
(2002)
-
-
Goto, K.1
van de Geijn, R.2
-
18
-
-
34547380631
-
-
IBM. Engineering and Scientific Subroutine Library for Linux on POWER, Version 4, Release 2.2, November 2005
-
IBM. Engineering and Scientific Subroutine Library for Linux on POWER, Version 4, Release 2.2, November 2005.
-
-
-
-
20
-
-
0042235298
-
Tiling, block data layout, and memory hierarchy performance
-
Park N, Hong B, Prasanna VK. Tiling, block data layout, and memory hierarchy performance. IEEE Transactions on Parallel and Distributed Systems 2003; 14(7):640-654.
-
(2003)
IEEE Transactions on Parallel and Distributed Systems
, vol.14
, Issue.7
, pp. 640-654
-
-
Park, N.1
Hong, B.2
Prasanna, V.K.3
-
22
-
-
34547269430
-
-
IBM. Cell Broadband Engine Programming Handbook, Version 1.0, April 2006
-
IBM. Cell Broadband Engine Programming Handbook, Version 1.0, April 2006.
-
-
-
-
24
-
-
34547379017
-
-
IBM. SPU C/C, Language Extensions, Version 2.1, March 2006
-
IBM. SPU C/C++ Language Extensions, Version 2.1, March 2006.
-
-
-
-
25
-
-
0003533609
-
Performance of various computers using standard linear equations solver
-
Technical Report CS-89-85, Computer Science Department, University of Tennessee, Available at
-
Dongarra JJ. Performance of various computers using standard linear equations solver. Technical Report CS-89-85, Computer Science Department, University of Tennessee, 2006. Available at: http://www.netlib.org/benchmark/ performance.ps.
-
(2006)
-
-
Dongarra, J.J.1
-
26
-
-
34247349114
-
The potential of the Cell processor for scientific computing
-
ACM Press: New York
-
Williams S, Shalf J, Olilcer L, Kamil S, Husbands P, Yelick K. The potential of the Cell processor for scientific computing. Proceedings of the 2006 ACM International Conference on Computing Frontiers. ACM Press: New York, 2006.
-
(2006)
Proceedings of the 2006 ACM International Conference on Computing Frontiers
-
-
Williams, S.1
Shalf, J.2
Olilcer, L.3
Kamil, S.4
Husbands, P.5
Yelick, K.6
|