Fully-integrated CMOS direct-conversion receiver for 5GHz wireless LAN

2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF07

Volumn , Issue , 2007, Pages 201-204

  Lee, Mi Young ^a   Jeong, Chan Young ^a   Yoo, Changsik ^a   Kim, Yong Hoon ^a   Hwang, Jin Hong ^a   Park, Jin Soo ^b  

^a Hanyang University   (South Korea)

^b Samsung Advanced Institute of Technology (SAIT)   (South Korea)

Author keywords

CMOS; Direct conversion receiver; Frequency synthesizer; Wireless LAN

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; FREQUENCY SYNTHESIZERS; HARMONIC GENERATION; WIRELESS LOCAL AREA NETWORKS (WLAN);

DIRECT CONVERSION RECEIVERS; SUB-HARMONIC MIXING; SUPPLY VOLTAGE;

SIGNAL RECEIVERS;

EID: 34547328811     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SMIC.2007.322794     Document Type: Conference Paper

References (6)

1. IEEE Standard 802.11a-1999, Part 11 : Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications.
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4. C.-Y. Jeong and, C. Yoo, "5GHz low-phase noise CMOS quadrature VCO," IEEE Trans. Microwave and Wireless Component Letters, to be published.
5. C. C. Boon, M A. Do, K. S. Yeo, J. G. Ma, and X. L. Zhang, "RF CMOS low-phase-noise LC oscillator through, memory reduction tail, transistor," IEEE Trans. Circuits and Systems, Part-II, Vol. 51, No. 2, pp. 85-90, Feb. 2004.
6. E. A. M. Klumperink, S. L. J. Gierkink, A. P. van der Wel, and B. Nauta, "Reducing. MOSEF 1/f noise and power consumption by switched biasing," IEEE J. Solid-State Circuits, Vol. 35, No. 7, pp. 994-1001, Jul. 2000.