TP-PPV: Piecewise nonlinear, time-shifted oscillator macromodel extraction for fast, accurate PLL simulation

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2006, Pages 269-274

  Lai, Xiaolue ^a   Roychowdhury, Jaijeet ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

(PL) PROPERTIES; COMPUTER-AIDED DESIGN; CONTROL VOLTAGES; HOPPING FREQUENCIES; INTERNATIONAL CONFERENCES; JITTER PERFORMANCE; MACRO MODELING; MACRO-MODELS; MACROMODELING; NONLINEAR PHASE; NOVEL EXTRACTION; NOVEL METHODS; PPV MACROMODEL; RING VCO; STRONGLY NONLINEAR; THREE ORDERS OF MAGNITUDE; TRANSIENT RESPONSES; WIDE-RANGE;

DESIGN; EXTRACTION; FREQUENCY SYNTHESIZERS; JITTER; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; SIGNAL GENERATORS; VARIABLE FREQUENCY OSCILLATORS;

SPICE;

EID: 34547327527     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2006.320147     Document Type: Conference Paper

References (16)

1. J.L. Stensby. Phase-locked loops: Theory and applications. CRC Press, New York, 1997.
2. L. Nagel. SPICE2: A Computer Program to Simulate Semiconductor Circuits Electron. Res. Lab., Univ. Calif., Berkeley, 1975.
3. M. Takahashi, K. Ogawa, and K.S. Kundert. VCO jitter simulation and its comparison with measurement. In Proceedings of Design Automation Conference 1999, pages 85-88, June 1999.
4. K. Kundert. Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers. www.designers-guide.com, 2002.
5. A. Demir, E. Liu, A.L. Sangiovanni-Vineentelli, and I. Vassiliou. Behavioral simulation techniques for phase/delay-locked systems. In Proceedings of the Custom Integrated Circuits Conference 1994, pages 453-456, May 1997
6. F. Herzel and B. Razavi. A study of oscillator jitter due to supply and substrate noise. IEEE Trans. Circuits and Systems II, 6:56-62, Jan 1999.
7. X. Lai, Y. Wan, and J. Roychowdhury. Fast pll simulation using nonlinear vco macromodels for accurate prediction of jitter and cycle-slipping due to loop non-idealities and supply noise. In Proc. IEEE Asia South-Pacific Design Automation Conference, January 2005.
8. A Mehrotra. Noise analysis of phase-locked loops. Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on 499(9):1309-1316, September 2002.
9. X. Lai and J. Roychowdhury, Capturing Oscillator Injection Locking via Nonlinear Phase-Domain Macromodels. IEEE Trans. Microwave Theory Tech., 52(9):2251-2261, September 2004.
10. A. Demir, A. Mehrotra. and J. Roychowdhury. Phase noise in oscillators: a unifying theory and numerical methods for characterization. IEEE Trans. on Circuits and Systems-I:Fundamental Theory and Applications, 47(5):655-674, May 2000.
11. A. Demir and J. Roychowdhury. A reliable and efficient procedure for oscillator ppv computation, with phase noise macromodelling applications. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 22(2): 188-197, February 2003.
12. A. Demir. Phase noise in oscillators: Daes and colored noise sources. In IEEE/ACM International Conference on Computer-Aided Design, November 1998.
13. A. Demir, D. Long, and J. Roychowdhury. Computing phase noise eigen-functions directly from steady-state jacobian matrices. In IEEE/ACM International Conference on Computer Aided Design, pages 283-288, November 2000.
14. M. Rewienski and .J. White. A trajectory piecewise-linear approach to model order reduction. and fast simulation of nonlinear circuits and micromachined devices. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 11:155-170, Feb 2003.
15. N. Dong and J. Roychowdhury. Piecewise polynomial nonlinear model reduction. In Proc. IEEE Design Automation Conference, June 2003.
16. -α noise in oscillators. International Journal of Circuit Theory and. Applications. 18:485-519, 1990.