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Volumn , Issue , 2007, Pages 262-263

Chip multi-processor generator

Author keywords

Chip multi processor; High level design

Indexed keywords

CHIP MULTI-PROCESSORS; HIGH-LEVEL DESIGN;

EID: 34547268741     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2007.375164     Document Type: Conference Paper
Times cited : (9)

References (11)
  • 1
    • 0000990728 scopus 로고    scopus 로고
    • Limitations and Challenges of Computer-Aided Design Technology for CMOS VLSI
    • March
    • Bryant, R., et al. Limitations and Challenges of Computer-Aided Design Technology for CMOS VLSI. Proceedings of IEEE, vol. 89, 3, March 2001, 341-365.
    • (2001) Proceedings of IEEE , vol.89 , Issue.3 , pp. 341-365
    • Bryant, R.1
  • 2
    • 0036937547 scopus 로고    scopus 로고
    • Reducing SoC Simulation and Development Time
    • December
    • Rowen, C. Reducing SoC Simulation and Development Time. IEEE Computer, 11, December 2002, 29-34.
    • (2002) IEEE Computer , vol.11 , pp. 29-34
    • Rowen, C.1
  • 3
    • 64549097436 scopus 로고    scopus 로고
    • Networking Applications for Xtensa Configurable Processors
    • January 25th
    • Dixit, A. Networking Applications for Xtensa Configurable Processors. Linley Tech 2006, January 25th 2006.
    • (2006) Linley Tech 2006
    • Dixit, A.1
  • 4
    • 34547341083 scopus 로고    scopus 로고
    • Wireless Terminals Solutions Guide. Texas Instruments
    • Wireless Terminals Solutions Guide. Texas Instruments.
  • 5
    • 34547330226 scopus 로고    scopus 로고
    • Heterogeneous Multiprocessing for Efficient Multi-Standard High Definition Video Decoding
    • August
    • Mutz, S., et al. Heterogeneous Multiprocessing for Efficient Multi-Standard High Definition Video Decoding. Hotchips 18, August 2006.
    • (2006) Hotchips , vol.18
    • Mutz, S.1
  • 6
    • 84858099609 scopus 로고    scopus 로고
    • http://www.cswitch.com
  • 7
    • 84858099605 scopus 로고    scopus 로고
    • http://www.streamprocessors.com
  • 9
    • 11944272652 scopus 로고    scopus 로고
    • Architecture and Circuit Techniques for a 1.1GHz 16-kb Reconfigurable Memory in 0.18um-CMOS
    • January
    • Mai, K., et al. Architecture and Circuit Techniques for a 1.1GHz 16-kb Reconfigurable Memory in 0.18um-CMOS. IEEE Journal of Solid- State Circuits, January 2005.
    • (2005) IEEE Journal of Solid- State Circuits
    • Mai, K.1
  • 10
    • 0041562664 scopus 로고    scopus 로고
    • Programmable Stream Processors
    • August
    • Kapasi, U., et al. Programmable Stream Processors. IEEE Computer, vol. 36, 8, August 2003, 54-62.
    • (2003) IEEE Computer , vol.36 , Issue.8 , pp. 54-62
    • Kapasi, U.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.