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Volumn , Issue , 2006, Pages 2909-2912

Side channel analysis resistant design flow

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT SIMULATION; CRYPTOGRAPHY; ELECTRIC CONNECTORS; MICROPROCESSOR CHIPS; PHASE CHANGING CIRCUITS;

EID: 34547241618     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (23)

References (13)
  • 1
    • 84939573910 scopus 로고    scopus 로고
    • P. C. Kocher, J. Jaffe, and B. Jun., Differential Power Analysis. In Michael Wiener, Advances in Cryptology - CRYPTO '99. 19th Annual International Cryptology Conference, Santa Barbara, California, USA, August 15- 19, 1999, Proceedings, 1666 of Lecture Notes in Computer Science, pages 388-397. Springer, 1999.
    • P. C. Kocher, J. Jaffe, and B. Jun., "Differential Power Analysis." In Michael Wiener, Advances in Cryptology - CRYPTO '99. 19th Annual International Cryptology Conference, Santa Barbara, California, USA, August 15- 19, 1999, Proceedings, volume 1666 of Lecture Notes in Computer Science, pages 388-397. Springer, 1999.
  • 2
    • 3042604811 scopus 로고    scopus 로고
    • A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation
    • 16-20 February, Paris, France, IEEE Computer Society, 2004
    • K. Tiri and I. Verbauwhede. "A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation". In 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pages 246-251. IEEE Computer Society, 2004.
    • (2004) 2004 Design, Automation and Test in Europe Conference and Exposition (DATE , pp. 246-251
    • Tiri, K.1    Verbauwhede, I.2
  • 3
    • 34547297413 scopus 로고    scopus 로고
    • Rechenwerk, Verfahren zum Ausfuhren einer Operation mit einem verschlüsselten Operanden, Carry-Select-Addierer und Kryptographieprozessor
    • German Patent DE 10201449 C1, January
    • F. Klug, O. Kniffler, and B. Gammel. "Rechenwerk, Verfahren zum Ausfuhren einer Operation mit einem verschlüsselten Operanden, Carry-Select-Addierer und Kryptographieprozessor. German Patent DE 10201449 C1, January 2002.
    • (2002)
    • Klug, F.1    Kniffler, O.2    Gammel, B.3
  • 4
    • 24144459808 scopus 로고    scopus 로고
    • Side-Channel Leakage of Masked CMOS Gates
    • Proceedings of the RSA Conference 2005 Cryptographers' Track CT-RSA, February 14-18, San Francisco, USA, Springer Verlag, 2005
    • S. Mangard, T. Popp, B. Gammel, "Side-Channel Leakage of Masked CMOS Gates", Proceedings of the RSA Conference 2005 Cryptographers' Track (CT-RSA 2005, February 14-18, 2005, San Francisco, USA), Lecture Notes in Computer Science (LNCS), Springer Verlag, 2005
    • (2005) Lecture Notes in Computer Science (LNCS
    • Mangard, S.1    Popp, T.2    Gammel, B.3
  • 5
    • 27244451515 scopus 로고    scopus 로고
    • Masked Dual-Rail Pre-Charge Logic: DPA-Resistance without Routing Constraints
    • Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems 2005 CHES, August 29, September 1, Edinburgh, Scotland, Springer Verlag, 2005
    • T. Popp, S. Mangard, "Masked Dual-Rail Pre-Charge Logic: DPA-Resistance without Routing Constraints", Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems 2005 (CHES 2005, August 29 - September 1, 2005, Edinburgh, Scotland), Lecture Notes in Computer Science (LNCS), Springer Verlag, 2005
    • (2005) Lecture Notes in Computer Science (LNCS
    • Popp, T.1    Mangard, S.2
  • 8
    • 33846588491 scopus 로고    scopus 로고
    • A Power Consumption Randomization Countermeasure for DPA-Resistant Cryptographic Processor, Integrated Circuit and System Design - Power and Timing Modeling, Optimization and Simulation - PATMOS 2004
    • M. Bucci, M. Guglielmo, R. Luzzi, and A. Trifiletti, "A Power Consumption Randomization Countermeasure for DPA-Resistant Cryptographic Processor", Integrated Circuit and System Design - Power and Timing Modeling, Optimization and Simulation - PATMOS 2004, Lecture Notes in Computer Science, 3254, pp. 481-490, 2004.
    • (2004) Lecture Notes in Computer Science , vol.3254 , pp. 481-490
    • Bucci, M.1    Guglielmo, M.2    Luzzi, R.3    Trifiletti, A.4
  • 9
    • 27244458099 scopus 로고    scopus 로고
    • Security Evaluation Against Electromagnetic Analysis at Design Time, Workshop on Cryptographic Hardware and Embedded Systems - CHES 2005
    • H. Li, A.T. Markettos, and S. Moore, "Security Evaluation Against Electromagnetic Analysis at Design Time", Workshop on Cryptographic Hardware and Embedded Systems - CHES 2005, Lecture Notes in Computer Science. 3659, pp. 280-292, 2005.
    • (2005) Lecture Notes in Computer Science , vol.3659 , pp. 280-292
    • Li, H.1    Markettos, A.T.2    Moore, S.3
  • 10
    • 34547244156 scopus 로고    scopus 로고
    • AES, Available at
    • AES, Advanced Encryption Standard, FIPS 197, Available at http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf.
    • Advanced Encryption Standard, FIPS , vol.197
  • 11
    • 35248825993 scopus 로고    scopus 로고
    • Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology
    • Colin D. Walter, Cetin Kaya Koc, and Christof Paar, editors, Cryptographic Hardware and Embedded Systems, CHES 2003, 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings, of, Springer
    • Kris Tiri and Ingrid Verbauwhede. "Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology." In Colin D. Walter, Cetin Kaya Koc, and Christof Paar, editors, Cryptographic Hardware and Embedded Systems - CHES 2003, 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings, volume 2779 of Lecture Notes in Computer Science, pages 137-151. Springer, 2003.
    • (2003) Lecture Notes in Computer Science , vol.2779 , pp. 137-151
    • Tiri, K.1    Verbauwhede, I.2
  • 12
    • 27244451021 scopus 로고    scopus 로고
    • Successfully Attacking Masked AES Hardware Implementations
    • Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems 2005 CHES, August 29, September 1, Edinburgh, Scotland, Springer Verlag, 2005
    • S. Mangard, N. Pramstaller, and E. Oswald. "Successfully Attacking Masked AES Hardware Implementations", Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems 2005 (CHES 2005, August 29 - September 1, 2005, Edinburgh, Scotland), Lecture Notes in Computer Science (LNCS), Springer Verlag, 2005
    • (2005) Lecture Notes in Computer Science (LNCS
    • Mangard, S.1    Pramstaller, N.2    Oswald, E.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.