Dynamically Reconfigurable CORDIC Coprocessor for Trigonometric Computing

Lecture Notes in Informatics (LNI), Proceedings - Series of the Gesellschaft fur Informatik (GI)

Volumn P-81, Issue , 2006, Pages 254-263

  Fons, Francisco ^a   Fons, Mariano ^a   Cantd, Enrique ^a   López, Mariano ^b  

^a UNIVERSITAT ROVIRA I VIRGILI   (Spain)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL COMPUTERS; FIXED PLATFORMS; SYSTEM-ON-CHIP;

CO-DESIGNS; CO-ORDINATE ROTATION DIGITAL COMPUTERS; CO-PROCESSORS; COMPUTE-INTENSIVE TASKS; COORDINATE ROTATION DIGITAL COMPUTER ALGORITHMS; ENGINEERING APPLICATIONS; HIGH PERFORMANCE PROCESSORS; RECONFIGURABLE; SYSTEM-ON-CHIP DEVICES; SYSTEMS-ON-CHIP DEVICES;

COPROCESSOR;

EID: 34250879168     PISSN: 16175468     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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2. Walther, J. S.: “A Unified Algorithm for Elementary Functions", Proc. 38th Spring Joint Computer Conference, 1971; pp.379-385.
3. Vladimirova, T.; Tiggeler, H.: “FPGA Implementation of Sine and Cosine Generators Using the CORDIC Algorithm", MAPLD'99, 1999.
4. Timmermann, D. et al.: "A Programmable CORDIC Chip for Digital Signal Processing Applications", IEEE Journal of Solid-State Circuits, 1991; vol.26, no.9, pp.1317-1321.
5. Andraka, R.: "A Survey of CORDIC Algorithms for FPGA Based Computers", Proc. 6th International Symposium on FPGAs, Monterey, USA, 1998; pp.191-200.
6. Atmel Corp.: “AT94K Series Cache Logic® (Mode 4) Configuration,) 2001.
7. Hu, Y. H.: 4tCORDIC-Based VLSI Architectures for Digital Signal Processing", IEEE Signal Processing Magazine, 1992; pp.16-35.
8. Vadlamani, S.; Mahmoud, W.: "Comparison of CORDIC Algorithm Implementations on FPGA families,, Proc. 34th Southeastern Symposium on System Theory, 2002.
9. Ligon, W. B. et al.: "Implementation and Analysis of Numerical Components for Reconfigurable Computing". Proc. IEEE Aerospace Conference, 1999; vol.2.