-
1
-
-
11244299315
-
A design for variable fractional delay FIR filters
-
Jun
-
X. Li, H. Zhao, M. Li, and J. Wu, "A design for variable fractional delay FIR filters," in Proc. Int. Conf. Commun., Circuits Syst., Jun. 2004, vol. 2, pp. 1131-1135.
-
(2004)
Proc. Int. Conf. Commun., Circuits Syst
, vol.2
, pp. 1131-1135
-
-
Li, X.1
Zhao, H.2
Li, M.3
Wu, J.4
-
2
-
-
0344088339
-
On the design of adjustable fractional delay FIR filters
-
Apr
-
H. Johansson and P. Lowenborg, "On the design of adjustable fractional delay FIR filters," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 4, pp. 164-169, Apr. 2003.
-
(2003)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.50
, Issue.4
, pp. 164-169
-
-
Johansson, H.1
Lowenborg, P.2
-
3
-
-
0035355466
-
Discretization-free design of variable fractional-delay FIR digital filters
-
Jun
-
T. B. Deng, "Discretization-free design of variable fractional-delay FIR digital filters," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 48, no. 6, pp. 637-644, Jun. 2001.
-
(2001)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.48
, Issue.6
, pp. 637-644
-
-
Deng, T.B.1
-
4
-
-
85032751540
-
Splitting the unit delay: Tools for fractional delay filter design
-
Jan
-
T. I. Laakso, V. Valimaki, M. Karjalainen, and U. K. Laine, "Splitting the unit delay: Tools for fractional delay filter design," IEEE Signal Process. Mag., vol. 13, no. 1, pp. 30-60, Jan. 1996.
-
(1996)
IEEE Signal Process. Mag
, vol.13
, Issue.1
, pp. 30-60
-
-
Laakso, T.I.1
Valimaki, V.2
Karjalainen, M.3
Laine, U.K.4
-
5
-
-
33847660680
-
Design of variable fractional delay FIR filters using genetic algorithm
-
Dec
-
K. Khamei, A. Nabavi, and S. Hessabi, "Design of variable fractional delay FIR filters using genetic algorithm," in Proc. IEEE Int. Conf. Electron., Circuits Syst., Dec. 2003, vol. 1, pp. 48-51.
-
(2003)
Proc. IEEE Int. Conf. Electron., Circuits Syst
, vol.1
, pp. 48-51
-
-
Khamei, K.1
Nabavi, A.2
Hessabi, S.3
-
6
-
-
0024125148
-
A continuously variable digital delay element
-
Jun
-
C. W. Farrow, "A continuously variable digital delay element," in Proc. IEEE Int. Symp. Circuits Syst., Jun. 1988, vol. 3, pp. 2641-2645.
-
(1988)
Proc. IEEE Int. Symp. Circuits Syst
, vol.3
, pp. 2641-2645
-
-
Farrow, C.W.1
-
7
-
-
0032664459
-
A trellis search algorithm for the design of FIR filters with signed-powers-of-two coefficients
-
Jan
-
C.-L. Chen and A. N. Willson, "A trellis search algorithm for the design of FIR filters with signed-powers-of-two coefficients," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 1, pp. 29-39, Jan. 1999.
-
(1999)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.46
, Issue.1
, pp. 29-39
-
-
Chen, C.-L.1
Willson, A.N.2
-
8
-
-
0034428064
-
FIR filter design over discrete coefficients and least-square error
-
Dec
-
H. H. Dam, S. Nordebo, K. L. Teo, and A. Cantoni, "FIR filter design over discrete coefficients and least-square error," Proc. IEE Vision, Image Signal Process., vol. 147, no. 6, pp. 543-548, Dec. 2000.
-
(2000)
Proc. IEE Vision, Image Signal Process
, vol.147
, Issue.6
, pp. 543-548
-
-
Dam, H.H.1
Nordebo, S.2
Teo, K.L.3
Cantoni, A.4
-
9
-
-
0029207603
-
A new approach to the design of discrete coefficient FIR digital filters
-
Jan
-
J.-J. Shyu and Y.-C. Lin, "A new approach to the design of discrete coefficient FIR digital filters," IEEE Trans. Acoust., Speech, Signal Process., vol. 43, no. 1, pp. 310-314, Jan. 1995.
-
(1995)
IEEE Trans. Acoust., Speech, Signal Process
, vol.43
, Issue.1
, pp. 310-314
-
-
Shyu, J.-J.1
Lin, Y.-C.2
-
10
-
-
34250859516
-
A branch and bound based approach to digital filter design with power-of-two coefficients
-
Dec, ISBN: 18768115, CDROM
-
W. R. Lee, L. Caccetta, K. L. Teo, and V. Rehbock, "A branch and bound based approach to digital filter design with power-of-two coefficients," in Proc. ICOTA, Dec. 2004, ISBN: 18768115, CDROM.
-
(2004)
Proc. ICOTA
-
-
Lee, W.R.1
Caccetta, L.2
Teo, K.L.3
Rehbock, V.4
-
11
-
-
0025592978
-
Design of discrete-coefficient-value linear phase FIR filters with optimum normalized peak ripple magnitude
-
Dec
-
Y. C. Lim, "Design of discrete-coefficient-value linear phase FIR filters with optimum normalized peak ripple magnitude," IEEE Trans. Circuits Syst., vol. 37, no. 12, pp. 1480-1486, Dec. 1990.
-
(1990)
IEEE Trans. Circuits Syst
, vol.37
, Issue.12
, pp. 1480-1486
-
-
Lim, Y.C.1
-
12
-
-
0037934620
-
On the design and efficient implementation of the Farrow structure
-
Jul
-
C. K. S. Pun, Y. C. Wu, S. C. Chan, and K. L. Ho, "On the design and efficient implementation of the Farrow structure," IEEE Signal Process. Lett., vol. 10, no. 7, pp. 189-192, Jul. 2003.
-
(2003)
IEEE Signal Process. Lett
, vol.10
, Issue.7
, pp. 189-192
-
-
Pun, C.K.S.1
Wu, Y.C.2
Chan, S.C.3
Ho, K.L.4
-
13
-
-
0036881898
-
On the design and implementation of FIR and IIR digital filters with variable frequency charactericstics
-
Nov
-
C. K. S. Pun, S. C. Chan, K. S. Yeung, and K. L. Ho, "On the design and implementation of FIR and IIR digital filters with variable frequency charactericstics," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 49, no. 11, pp. 689-703, Nov. 2002.
-
(2002)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.49
, Issue.11
, pp. 689-703
-
-
Pun, C.K.S.1
Chan, S.C.2
Yeung, K.S.3
Ho, K.L.4
-
14
-
-
77956425489
-
Multiplier-free polynomial-based FIR filters with an adjustable fractional delay
-
Sep
-
J. Y. Kaakinen and T. Saramaki, "Multiplier-free polynomial-based FIR filters with an adjustable fractional delay," in Proc. 9th Int. Conf. Syst., Sep. 2002, vol. 3, pp. 1167-1170.
-
(2002)
Proc. 9th Int. Conf. Syst
, vol.3
, pp. 1167-1170
-
-
Kaakinen, J.Y.1
Saramaki, T.2
-
15
-
-
0036685466
-
A polynomial time algorithm for designing FIR filters with power-of-two coefficients
-
Aug
-
D. Li, Y. C. Lim, Y. Lian, and J. Song, "A polynomial time algorithm for designing FIR filters with power-of-two coefficients," IEEE Trans. Signal Process., vol. 50, no. 8, pp. 1935-1941, Aug. 2002.
-
(2002)
IEEE Trans. Signal Process
, vol.50
, Issue.8
, pp. 1935-1941
-
-
Li, D.1
Lim, Y.C.2
Lian, Y.3
Song, J.4
-
16
-
-
0006999247
-
-
G. L. Nemhauser, A. H. G. R. Kan, and M. J. Todd, Eds. Amsterdam, The Netherlands: North-Holland
-
Optimisation, G. L. Nemhauser, A. H. G. R. Kan, and M. J. Todd, Eds. Amsterdam, The Netherlands: North-Holland, 1989.
-
(1989)
Optimisation
-
-
-
17
-
-
33847630784
-
Variable digital filter with least-square criterion and peak gain constraints
-
Jan
-
H. H. Dam, A. Cantoni, K. L. Teo, and S. Nordholm, "Variable digital filter with least-square criterion and peak gain constraints," IEEE Trans. Circuits Syst. II, Express Briefs, vol. 54, no. 1, pp. 24-28, Jan. 2007.
-
(2007)
IEEE Trans. Circuits Syst. II, Express Briefs
, vol.54
, Issue.1
, pp. 24-28
-
-
Dam, H.H.1
Cantoni, A.2
Teo, K.L.3
Nordholm, S.4
-
18
-
-
0029374075
-
Use of minimum-adder multiplier blocks in FIR digital filters
-
Sep
-
A. G. Dempster and M. D. Macleod, "Use of minimum-adder multiplier blocks in FIR digital filters," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 9, pp. 569-577, Sep. 1995.
-
(1995)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.42
, Issue.9
, pp. 569-577
-
-
Dempster, A.G.1
Macleod, M.D.2
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