A multimode GSM/DCS/WCDMA double loop frequency synthesizer

2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005

Volumn , Issue , 2005, Pages 201-204

  Badets, Franck ^a   Camino, Laurent ^a   Dedieu, Sebastien ^a   Belot, Didier ^a   Rieubon, Sebastien ^a   Divel, Thiery ^a   Cerisier, Patrick ^b  

^a STMICROELECTRONICS   (France)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BICMOS TECHNOLOGY; CODE DIVISION MULTIPLE ACCESS; ELECTRIC POWER UTILIZATION; FREQUENCY SYNTHESIZERS; WIRELESS TELECOMMUNICATION SYSTEMS;

DOUBLE LOOP SYNTHESIZER; INTEGER SYNTHESIZER; PCS MULTIMODE FREQUENCY SYNTHESIZER; RF BICMOS TECHNOLOGY;

GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS;

EID: 34250719662     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2005.251700     Document Type: Conference Paper

References (3)

1. E. Duvivier, S. Cipriani, L. Carpineto, "A fully Integrated Zero IF Transceiver for GSM-GPRS Quad band Application," Solid State Circuits Conference 2003 Digest of Technical Papers ISSCC 2003, p 274-275.
2. S. Mattisson, "Frequency Synthesis for Integrated Transceivers," in Workshop on Advances in Analog Circuit Design (AACD), 2000, vol. 9
3. C. Vaucher, "Architectures for RF Frequency Synthesizers", chapter four, pp 133-1337, Kluwer Acadenic Publishers, 2002