메뉴 건너뛰기




Volumn , Issue , 2006, Pages 182-187

Efficient representation for formal verification of PLC programs

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL MATHEMATICS; COMPUTATIONAL EFFICIENCY; COMPUTER SOFTWARE; MATHEMATICAL MODELS; MODEL CHECKING;

EID: 34250703873     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/WODES.2006.1678428     Document Type: Conference Paper
Times cited : (53)

References (14)
  • 1
    • 0028417248 scopus 로고
    • Modeling programmable logic controllers for logic verification
    • IEEE Comp. Soc. Press
    • I. Moon, "Modeling programmable logic controllers for logic verification," in Control Systems Magazine, IEEE. IEEE Comp. Soc. Press, 1994, pp. 53-59.
    • (1994) Control Systems Magazine, IEEE , pp. 53-59
    • Moon, I.1
  • 4
    • 34250767909 scopus 로고    scopus 로고
    • Automatic verification of temporal and timed properties of control programs,
    • Ph.D. dissertation, University of Birmingham
    • B. Zoubek, "Automatic verification of temporal and timed properties of control programs," Ph.D. dissertation, University of Birmingham, 2004.
    • (2004)
    • Zoubek, B.1
  • 5
    • 0034497480 scopus 로고    scopus 로고
    • Formal methods in PLC programming
    • October
    • G. Frey and L. Litz, "Formal methods in PLC programming," in Proc. of the IEEE SMC 2000, October 2000, pp. 2431-2436.
    • (2000) Proc. of the IEEE SMC 2000 , pp. 2431-2436
    • Frey, G.1    Litz, L.2
  • 6
    • 0036058214 scopus 로고    scopus 로고
    • Verification of a controller for a flexible manufacturing line written in ladder diagram via model-checking
    • May
    • O. de Smet and O. Rossi, "Verification of a controller for a flexible manufacturing line written in ladder diagram via model-checking," in American Control Conference. ACC'02, May 2002, pp. 4147-4152.
    • (2002) American Control Conference. ACC'02 , pp. 4147-4152
    • de Smet, O.1    Rossi, O.2
  • 7
    • 33847261517 scopus 로고    scopus 로고
    • Verification of a timed multitask system with Uppaal
    • Catania, Italy: IEEE Industrial Electronics Society, Sept
    • H. Bel Mokadem, B. Bérard, V. Gourcuff, J.-M. Roussel, and O. de Smet, "Verification of a timed multitask system with Uppaal," in Proc. of ETFA'05. Catania, Italy: IEEE Industrial Electronics Society, Sept. 2005, pp. 347-354.
    • (2005) Proc. of ETFA'05 , pp. 347-354
    • Bel Mokadem, H.1    Bérard, B.2    Gourcuff, V.3    Roussel, J.-M.4    de Smet, O.5
  • 8
    • 0012934281 scopus 로고    scopus 로고
    • A synchronous model of IEC 61131 PLC languages in SIGNAL
    • F. Jiménez-Fraustro and É. Rutten, "A synchronous model of IEC 61131 PLC languages in SIGNAL." in ECRTS, 2001, pp. 135-142.
    • (2001) ECRTS , pp. 135-142
    • Jiménez-Fraustro, F.1    Rutten, E.2
  • 10
    • 0004275127 scopus 로고    scopus 로고
    • Cadence Berkeley Labs
    • K. L. McMillan, The SMV Language, Cadence Berkeley Labs, http://www-cad.eecs.berkeley.edu/~kenmcmil/language.ps.
    • The SMV Language
    • McMillan, K.L.1
  • 11
    • 84958037228 scopus 로고    scopus 로고
    • UP-PAAL - a tool suite for automatic verification of real-time systems
    • Proc. Workshop Hybrid Systems III: Verification and Control, New Brunswick, NJ, USA, Oct. 1995, Springer
    • J. Bengtsson, K. Larsen, F. Larsson, P. Pettersson, and W. Yi, "UP-PAAL - a tool suite for automatic verification of real-time systems," in Proc. Workshop Hybrid Systems III: Verification and Control, New Brunswick, NJ, USA, Oct. 1995, ser. Lecture Notes in Computer Science, vol. 1066. Springer, 1996, pp. 232-243.
    • (1996) ser. Lecture Notes in Computer Science , vol.1066 , pp. 232-243
    • Bengtsson, J.1    Larsen, K.2    Larsson, F.3    Pettersson, P.4    Yi, W.5
  • 12
    • 0242366064 scopus 로고    scopus 로고
    • A study of current logic design practices in the automotive manufacturing industry
    • M. R. Lucas and D. M. Tilbury, "A study of current logic design practices in the automotive manufacturing industry," Int. J. Hum.-Comput. Stud., vol. 59, no. 5, pp. 725-753, 2003.
    • (2003) Int. J. Hum.-Comput. Stud , vol.59 , Issue.5 , pp. 725-753
    • Lucas, M.R.1    Tilbury, D.M.2
  • 13
    • 0242416218 scopus 로고    scopus 로고
    • NuSMV Version 2: An OpenSource Tool for Symbolic Model Checking
    • Proc. International Conference on Computer-Aided Verification CAV 2002, Copenhagen, Denmark: Springer, July
    • A. Cimatti, E. Clarke, E. Giunchiglia, F. Giunchiglia, M. Pistore, M. Roveri, R. Sebastiani, and A. Tacchella, "NuSMV Version 2: An OpenSource Tool for Symbolic Model Checking," in Proc. International Conference on Computer-Aided Verification (CAV 2002), ser. LNCS, vol. 2004. Copenhagen, Denmark: Springer, July 2002.
    • (2002) ser. LNCS , vol.2004
    • Cimatti, A.1    Clarke, E.2    Giunchiglia, E.3    Giunchiglia, F.4    Pistore, M.5    Roveri, M.6    Sebastiani, R.7    Tacchella, A.8
  • 14
    • 34250738071 scopus 로고    scopus 로고
    • Validation formelle de programmes ladder diagram pour automates programmables industriels (formal verification of PLC program written in ladder diagram),
    • Ph.D. dissertation, ENS de Cachan
    • O. Rossi, "Validation formelle de programmes ladder diagram pour automates programmables industriels (formal verification of PLC program written in ladder diagram)," Ph.D. dissertation, ENS de Cachan, 2003.
    • (2003)
    • Rossi, O.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.