-
2
-
-
49849104811
-
-
AMD opteron woes, Online, Available
-
AMD opteron woes. DailyTech. [Online], Available: http://www.dailytech. com/article.aspx?news.id=2039&ref=y
-
DailyTech
-
-
-
3
-
-
49849084780
-
-
May, it's a case of FPU all over again. EE Times
-
A. Wolfe. (1997, May) For Intel, it's a case of FPU all over again. EE Times.
-
(1997)
For Intel
-
-
Wolfe, A.1
-
5
-
-
49849103399
-
-
Revision Guide for AMD Athlon 64 and AMD Opteron Processors, Advanced Micro Devices Std. Publication 25 759, Rev. 3.57, Aug 2005.
-
Revision Guide for AMD Athlon 64 and AMD Opteron Processors, Advanced Micro Devices Std. Publication 25 759, Rev. 3.57, Aug 2005.
-
-
-
-
6
-
-
49849102202
-
-
Aug, bugs. The Inquirer, Online, Available
-
M. Magee. (2002, Aug) Intel's hidden Xeon, Pentium 4 bugs. The Inquirer. [Online]. Available: http://www.theinquirer.net/default.aspx?article=5184
-
(2002)
Intel's hidden Xeon, Pentium
, vol.4
-
-
Magee, M.1
-
8
-
-
0033321638
-
DIVA: A reliable substrate for deep submicron microarchitecture design
-
Washington, DC, USA: IEEE Computer Society
-
T. M. Austin, "DIVA: A reliable substrate for deep submicron microarchitecture design," in Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture. Washington, DC, USA: IEEE Computer Society, 1999, pp. 196-207.
-
(1999)
Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture
, pp. 196-207
-
-
Austin, T.M.1
-
9
-
-
0037669859
-
DISE: A programmable macro engine for customizing applications
-
New York, NY, USA: ACM Press
-
M. L. Corliss, E. C. Lewis, and A. Roth, "DISE: A programmable macro engine for customizing applications," in Proceedings of the 30th Annual International Symposium on Computer Architecture. New York, NY, USA: ACM Press, 2003, pp. 362-373.
-
(2003)
Proceedings of the 30th Annual International Symposium on Computer Architecture
, pp. 362-373
-
-
Corliss, M.L.1
Lewis, E.C.2
Roth, A.3
-
10
-
-
49849099052
-
-
AMD64 Virutalization Codenamed Pacifica Technology, Secure Virtual Machine Architecture Reference Manual, Advanced Micro Devices Std. 33 047, Rev. 3.0.1, May 2005.
-
AMD64 Virutalization Codenamed "Pacifica" Technology, Secure Virtual Machine Architecture Reference Manual, Advanced Micro Devices Std. 33 047, Rev. 3.0.1, May 2005.
-
-
-
-
11
-
-
84876286608
-
-
2005, Dec Intel virilization technology, Online
-
(2005, Dec) Intel virilization technology. Intel Corporation. [Online]. Available: http://www.intel.com/technology/com.puting/vptech/
-
Available
-
-
-
12
-
-
49849089635
-
The technology behind the crasoe processors
-
Transmeta Corporation, Jan
-
A. Klaiber, "The technology behind the crasoe processors," White paper, Transmeta Corporation, Jan 2000.
-
(2000)
White paper
-
-
Klaiber, A.1
-
13
-
-
84858788599
-
Microprocessor entomology: A taxonomy of design faults in CCTS microprocessors
-
Washington, DC, USA: IEEE Computer Society
-
A. Avizienis and Y. He, "Microprocessor entomology: A taxonomy of design faults in CCTS microprocessors," in Proceedings of the Conference on Dependable Computing for Critical Applications (DCCA). Washington, DC, USA: IEEE Computer Society, 1999, p. 3.
-
(1999)
Proceedings of the Conference on Dependable Computing for Critical Applications (DCCA)
, pp. 3
-
-
Avizienis, A.1
He, Y.2
-
14
-
-
0036292677
-
SafetyNet: Improving the availability of shared-memory multiprocessors with global checkpoint/recovery
-
IEEE Computer Society
-
D. J. Sorin, M. M. K. Martin, M. D. Hill, and D. A. Wood, "SafetyNet: Improving the availability of shared-memory multiprocessors with global checkpoint/recovery," in Pmceedings of the 29th Annual International Symposium on Computer Architecture. IEEE Computer Society, 2002, pp. 123-134.
-
(2002)
Pmceedings of the 29th Annual International Symposium on Computer Architecture
, pp. 123-134
-
-
Sorin, D.J.1
Martin, M.M.K.2
Hill, M.D.3
Wood, D.A.4
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