메뉴 건너뛰기




Volumn , Issue , 2006, Pages 393-398

Systematic software-based self-test for pipelined processors

Author keywords

Functional testing; Processor testing; Software based self test

Indexed keywords

LOGIC DESIGN; MICROPROCESSOR CHIPS; PIPELINE PROCESSING SYSTEMS; SOFTWARE ENGINEERING; SUPERVISORY AND EXECUTIVE PROGRAMS;

EID: 34249786960     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1146909.1147014     Document Type: Conference Paper
Times cited : (37)

References (16)
  • 2
    • 0032306939 scopus 로고    scopus 로고
    • Native Mode Functional Test Generation for Microprocessors with Applications to Self-Test and Design Validation
    • J.Shen, J.Abraham, "Native Mode Functional Test Generation for Microprocessors with Applications to Self-Test and Design Validation", IEEE Intl. Test Conf., pp. 990 - 999, 1998.
    • (1998) IEEE Intl. Test Conf , pp. 990-999
    • Shen, J.1    Abraham, J.2
  • 3
    • 0032691811 scopus 로고    scopus 로고
    • Instruction randomization self test for processor cores
    • K.Batcher, C.Papachnstou, "Instruction randomization self test for processor cores", IEEE VLSI Test Symp., pp. 34 - 40, 1999.
    • (1999) IEEE VLSI Test Symp , pp. 34-40
    • Batcher, K.1    Papachnstou, C.2
  • 6
    • 0035272504 scopus 로고    scopus 로고
    • Software-Based Self-Testing Methodology for Processor Cores
    • vo, March
    • L.Chen, S.Dey, "Software-Based Self-Testing Methodology for Processor Cores", IEEE Transactions on CAD, vo.20, no.3, pp. 369-380, March 2001.
    • (2001) IEEE Transactions on CAD , vol.20 , Issue.3 , pp. 369-380
    • Chen, L.1    Dey, S.2
  • 7
    • 0042134725 scopus 로고    scopus 로고
    • A Scalable Software-Based Self-Test Methodology for Programmable Processors
    • L.Chen, S.Ravi, A.Raghunathan, S.Dey, "A Scalable Software-Based Self-Test Methodology for Programmable Processors", Design Automation Conference, pp. 548 - 553, 2003.
    • (2003) Design Automation Conference , pp. 548-553
    • Chen, L.1    Ravi, S.2    Raghunathan, A.3    Dey, S.4
  • 10
    • 33847103496 scopus 로고    scopus 로고
    • Automated Mapping of Pre-Computed Module-Level Test Sequences to Processor Instructions
    • S.Gurumurthy, S.Vasudevan and J.Abraham, "Automated Mapping of Pre-Computed Module-Level Test Sequences to Processor Instructions", IEEE Intl. Test Conf, 2005.
    • (2005) IEEE Intl. Test Conf
    • Gurumurthy, S.1    Vasudevan, S.2    Abraham, J.3
  • 14
    • 85165858975 scopus 로고    scopus 로고
    • miniMIPS CPU www.opencores.org/projects/minimips
    • miniMIPS CPU www.opencores.org/projects/minimips
  • 15
    • 85165854515 scopus 로고    scopus 로고
    • OpenRISC1200 www.opencores.org/projects/web/orlk/openrisc_1200
    • OpenRISC1200


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.