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Volumn , Issue , 2003, Pages 90-93

A 4-Kb 667-MHz CMOS SRAM using dynamic threshold voltage wordline transistors

Author keywords

CMOS process; Manufacturing processes; MOSFETs; Power supplies; Prototypes; Random access memory; Semiconductor device manufacture; Threshold voltage; Time measurement; Voltage control

Indexed keywords

BANDPASS FILTERS; CMOS INTEGRATED CIRCUITS; DESIGN; DRAIN CURRENT; MANUFACTURE; MIXED SIGNAL INTEGRATED CIRCUITS; MOSFET DEVICES; RANDOM ACCESS STORAGE; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICES; STATIC RANDOM ACCESS STORAGE; THRESHOLD VOLTAGE; TIME MEASUREMENT; TRANSISTORS; VOLTAGE CONTROL;

EID: 34248655839     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SSMSD.2003.1190403     Document Type: Conference Paper
Times cited : (5)

References (9)
  • 3
    • 4544327926 scopus 로고    scopus 로고
    • MoSys explains 1T-SRAM technology
    • Sep. Reading: IEEE Press
    • P. N. Glaskowsky, "MoSys explains 1T-SRAM technology," Microprocessor Report, vol. 13, no. 12, pp. 1-2, Sep. 1999. Reading: IEEE Press, 1998.
    • (1998) Microprocessor Report , vol.13 , Issue.12 , pp. 1-2
    • Glaskowsky, P.N.1
  • 8
    • 0035505539 scopus 로고    scopus 로고
    • Analysis and compensation of the bitline multiplexer in SRAM current sense amplifier
    • Nov.
    • B. Wicht, S. Paul, and D. Schmitt-Landsiedel, "Analysis and compensation of the bitline multiplexer in SRAM current sense amplifier," IEEE J. Solid-State Circuits, vol. 36, no. 11, pp. 1745-1755, Nov. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , Issue.11 , pp. 1745-1755
    • Wicht, B.1    Paul, S.2    Schmitt-Landsiedel, D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.