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Volumn , Issue , 2006, Pages 200-202
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Incorporation of a photonic layer at the metallization levels of a CMOS circuit
a a a a b c c c d d |
Author keywords
[No Author keywords available]
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Indexed keywords
CMOS CIRCUITS;
LOW-TEMPERATURE FABRICATION;
METALLIZATIONS;
PHOTONIC CIRCUITS;
CMOS INTEGRATED CIRCUITS;
METALLIZING;
WAFER BONDING;
PHOTONICS;
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EID: 34248650195
PISSN: 19492081
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (29)
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References (6)
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