Exploiting program phase behavior for energy reduction on multi-configuration processors

Journal of Systems Architecture

Volumn 53, Issue 8, 2007, Pages 489-500

  Vandeputte, Frederik ^a   Eeckhout, Lieven ^a   De Bosschere, Koen ^a  

^a GHENT UNIVERSITY   (Belgium)

Author keywords

Configuration space exploration; Energy reduction; Multi configuration processors; Phase behavior

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; ELECTRIC POWER UTILIZATION; LOGIC DESIGN; ONLINE SYSTEMS; OPTIMIZATION; PHASE MEASUREMENT;

OFFLINE SEARCH ALGORITHMS; ONLINE PROCESSORS; PHASE CLASSIFICATION METHOD;

MICROPROCESSOR CHIPS;

EID: 34248564612     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2006.11.004     Document Type: Article

References (14)

1. Albonesi D.H., Balasubramonian R., Dropsho S.G., et al. Dynamically tuning processor resources with adaptive processing. Computer 36 12 (2003) 49-58
2. S. Dropsho, A. Buyuktosunoglu, R. Balasubramonian, D. Albonesi, et al., Integrating adaptive on-chip storage structures for reduced dynamic power, in: Proc. of Int. Conf. on Parallel Arch. and Compil. Techniques, 2002.
3. M.C. Huang, J. Renau, J. Torrellas, Positional adaptation of processors: application to energy reduction, in: Proc. of Int. Symp. on Computer Arch., 2003.
4. A.S. Dhodapkar, J.E. Smith, Managing multi-configuration hardware via dynamic working set analysis, in: Proc. of Int. Symp. on Computer Arch., 2002.
5. M. Huang, et al., A framework for dynamic energy efficiency and temperature management, in: Proc. of the Int. Symp. on Microarchitecture, 2000.
6. T. Sherwood, S. Sair, B. Calder, Phase tracking and prediction, in: Proc. of the Int. Symp. on Computer architecture, 2003.
7. D.H. Albonesi, Selective cache ways: on-demand cache resource allocation, in: Proc. of the 32nd Int. Symp. on Microarchitecture, 1999, pp. 248-259.
8. T. Sherwood, E. Perelman, G. Hamerly, B. Calder, Automatically characterizing large scale program behavior, in: Proc. of the Int. Conf. on Archit. support for program. languages and operating systems, 2002.
9. J. Lau, S. Schoenmackers, B. Calder, Transition phase classification and prediction, in: Proc. of Int. Symp. on High Performance Computer Arch., 2005.
10. F. Vandeputte, L. Eeckhout, K. De Bosschere, A detailed study on phase predictors, in: Proc. of the Euro-Par Conf., 2005.
11. D. Burger, T.M. Austin, The simplescalar tool set, version 2.0, SIGARCH Comput. Archit. News 25 (3).
12. D. Brooks, V. Tiwari, et al., Wattch: a framework for architectural-level power analysis and optimizations, in: Proc. of Int. Symp. on Computer Arch., 2000.
13. F. Vandeputte, L. Eeckhout, K. De Bosschere, An analysis of program phase behavior and its predictability, in: Proc. of the 7th Int. Conf. on Computing Anticipatory Systems (CASYS), 2006.
14. F. Vandeputte, L. Eeckhout, K. De Bosschere, Offline phase analysis and optimization for multi-configuration processors, in: Proc. of the 5th SAMOS workshop, 2005.