Development of a customized processor architecture for accelerating genetic algorithms

Microprocessors and Microsystems

Volumn 31, Issue 5, 2007, Pages 347-359

  Kavvadias, Nikolaos ^a   Giannakopoulou, Vasiliki ^a   Nikolaidis, Spiridon ^a  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

Author keywords

89.20.Ff; Application specific processors; Embedded systems; Field programmable gate arrays; Genetic algorithms; Hardware description languages

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENETIC ALGORITHMS; PROGRAMMABLE LOGIC CONTROLLERS; REDUCED INSTRUCTION SET COMPUTING;

APPLICATION SPECIFIC PROCESSORS; GENETIC OPERATORS; PROGRAMMABLE ACCELERATOR; VGP-I MODEL;

PROGRAM PROCESSORS;

EID: 34248206075     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2006.12.002     Document Type: Article

References (38)

1. Goldberg D.E. Genetic Algorithms in Search, Optimization, and Machine Learning (1989), Addison-Wesley, Reading, MA, USA
2. Holland J.H. Adaptation in Natural and Artificial Systems (1975), University of Michigan Press, Ann Arbor, Michigan, USA
3. D. Burns, K. May, T. Renz, V. Ross, Spiraling in on speed-ups of genetic algorithm solvers for coupled non-linear ODE system parameterization and DNA code word library synthesis, in: 2005 Military and Aerospace PLD International Conference (MAPLD 2005), Washington, DC, USA, 2005.
4. Hennessy J., and Patterson D. Computer Architecture: A Quantitative Approach. second ed. (1996), Morgan Kaufman Publishers, San Francisco, CA
5. Martin P. A hardware implementation of a genetic programming system using FPGAs and Handel-C. Genetic Programming and Evolvable Machines 2 4 (2001) 317-343
6. S. Koizumi, S. Wakabayashi, T. Koide, K. Fujiwara, N. Imura, A RISC processor for high-speed execution of genetic algorithms, in: Proceedings of the Genetic and Evolutionary Computation Conference (GECCO-2001), San Francisco, California, USA, 2001, pp. 1338-1345.
7. R.B. Lee, Multimedia extensions for general-purpose processors, in: Proceedings of the IEEE International Workshop on Signal Processing Systems, 1997, pp. 9-23.
8. G.M. Megson, I.M. Bland, Synthesis of a systolic array genetic algorithm, in: Proceedings of the 12th International Parallel Processing Symposium, Washington, DC, USA, 1998, pp. 316-320.
9. Altera Nios II home page. URL http://www.altera.com/products/ip/processors/nios2/.
10. J.-P. Choi, K.-R. Han, H.-J. Song, I.-J. Hwang, G.-Y. Song, Design of a microprocessor with genetic instructions, in: Proceedings of the 2002 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2002), Phuket, Thailand, 2002, pp. 666-669.
11. S.D. Scott, A. Samal, S. Seth, HGA: a hardware-based genetic algorithm, in: Proceedings of the ACM/SIGDA 3rd International Symposium on Field-Programmable Gate Arrays, 1995, pp. 53-59.
12. P. Graham, B. Nelson, Genetic algorithms in software and in hardware - a performance analysis of workstation and custom computing machine implementations, in: IEEE Symposium on Field-Programmable Custom Computing Machines, 1996, pp. 216-225.
13. O. Kitaura, H. Asada, M. Matsuzaki, T. Kawai, H. Ando, T. Shimada, A custom computing machine for genetic algorithms without pipeline stalls, in: Proceedings of the IEEE International Conference on Systems, Man, and Cybernetics, vol. V, 1999, pp. 577-583.
14. M.K. Pakhira, R.K. De, A hardware pipeline for function optimization using genetic algorithms, in: Proceedings of the 2005 Conference on Genetic and Evolutionary Computation (GECCO'05), 2005, pp. 949-956.
15. Tommiska M., and Vuori J. Implementation of genetic algorithms with programmable logic devices (1996), Vaasa, Finland
16. G. Koonar, S. Areibi, M. Moussa, Hardware implementation of genetic algorithms for VLSI CAD design, in: ISCA International Conference on Computer Applications in Industry and Engineering, 2002.
17. Shackleford B., Snider G., Carter R.J., Okushi E., Yasuda M., Seo K., and Yasuura H. A high-performance, pipelined, FPGA-based genetic algorithm module. Genetic Programming and Evolvable Machines 2 1 (2001) 33-60
18. S. Wakabayashi, T. Koide, N. Toshine, M. Goto, Y. Nakayama, K. Hatta, An LSI implementation of an adaptive genetic algorithm with on-the-fly crossover operator selection, in: Proceedings of the Asia and South Pacific Design Automation Conference, vol. 1, 1999, pp. 37-40.
19. W.M. Spears, Adapting crossover in evolutionary algorithms, in: Proceedings of the Evolutionary Programming Conference, 1995, pp. 367-384.
20. K.A.D. Jong, An analysis of the behavior of a class of genetic adaptive systems, Ph.D. thesis, Department of Computer and Communication Sciences, University of Michigan, 1975.
21. G. Syswerda, Uniform crossover in genetic algorithms, in: Proceedings of the 3rd International Conference on Genetic Algorithms, Fairfax, VA, USA, 1989, pp. 2-9.
22. ARM Ltd. URL http://www.arm.com.
23. MIPS technologies Inc. URL http://www.mips.com.
24. Gaisler research. URL http://www.gaisler.com.
25. Genetic algorithm utility library. URL http://gaul.sourceforge.net.
26. Syswerda G. Schedule optimization using genetic algorithms. In: Davis L. (Ed). Handbook of Genetic Algorithms (1991), Van Nostrand Reinhold, New York, NY, USA 332-349
27. Michalewicz Z. Genetic Algorithms + Data Structures = Evolution Programs. third ed. (1996), Springer, Berlin, Germany
28. LFSR testbench utility. URL http://www.jnicolle.com/LFSR/.
29. A. Brindle, Genetic algorithms for function optimization, Ph.D. thesis, University of Alberta, Edmonton, Canada, 1981.
30. Goldberg D.E., and Deb K. A comparative analysis of selection schemes used in genetic algorithms. In: Rawlins G.J.E. (Ed). Foundations of Genetic Algorithms (1991), Morgan Kaufmann, San Mateo, CA, USA 69-93
31. Xilinx home page. URL http://www.xilinx.com.
32. Xilinx ISE 7.1i (Webpack), Xilinx Inc., XST User Guide.
33. The ArchC resource center. URL http://www.archc.org.
34. R.E. Smith, D.E. Goldberg, J.A. Earickson, SGA-C: a C-language implementation of a simple genetic algorithm, TCGA Report No. 91002, The University of Alabama, Tuscaloosa, AL, USA, March 1994.
35. M. Matsumoto, N. Nishimura, Mersenne Twister pseudorandom number generator in C. URL http://www.math.sci.hiroshima-u.ac.jp/~m-mat/MT/emt.html.
36. CONCORDE. URL http://www.tsp.gatech.edu/concorde.html.
37. GALOPPS. URL http://garage.cps.msu.edu/software/galopps/.
38. TSPLIB. URL http://www.iwr.uni-heidelberg.de/groups/comopt/software/TSPLIB95/.