A 4-bit Double SONOS Memory (DSM) with 4 storage nodes per cell for ultimate multi-bit operation

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2006, Pages 40-41

  Oh, Chang Woo ^c   Kim, Sung Hwan ^c   Kim, Na Young ^c   Choi, Yong Lack ^c   Lee, Kwan Heum ^a   Kim, Byeong Soo ^a   Cho, Nam Myun ^a   Kim, Seung Beom ^b   Kim, Dong Won ^c   Park, Donggun ^c   Ryu, Byung Il ^c  

^a PDT   (South Korea)

^b MTT   (South Korea)

^c SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; GATE DIELECTRICS; PROGRAM PROCESSORS;

DOUBLE SONOS MEMORY (DSM); MULTI-BIT OPERATION;

MULTI AGENT SYSTEMS;

EID: 34247628022     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/vlsit.2006.1705206     Document Type: Conference Paper

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4. B. Y. Choi, et al., VLSI Tech. Dig., p. 118, 2005.
5. Y. K. Lee, et al., IEEE EDL., p. 317, 2004.