124MS/s Pixel-pipelined motion-JPEG 2000 codec without tile memory

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Chang, Yu Wei ^a   Fang, Hung Chi ^a   Cheng, Chih Chi ^a   Chen, Chun Chia ^a   Lian, Chung Jr ^a   Chien, Shao Yi ^a   Chen, Liang Gee ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; IMAGE COMPRESSION; PIXELS; VIDEO SIGNAL PROCESSING;

HARDWARE SHARING; TILE MEMORY;

IMAGE CODING;

EID: 34247576020     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. H. Yamauchi, et. al., "1440×1080 Pixel, 30 Frames per Second Motion-JPEG 2000 Codec for HD-Movie Transmission," IEEE J. Solid-State Circuits, pp. 331-341, Jan., 2005.
2. H.-C. Fang, et. al., "81 MS/s JPEG 2000 Single-Chip Encoder with Rate-Distortion Optimization," ISSCC Dig. Tech. Papers, Feb., 2004.