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Volumn 2006, Issue , 2006, Pages 95-103

Decomposing memory performance: Data structures and phases

Author keywords

CPU2000; Data structure; DTrack; Phase; Simulation; SPEC

Indexed keywords

MEMORY HIERARCHIES; MEMORY INTENSIVE DATA STRUCTURES; PROGRAM PHASES;

EID: 34247281549     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1133956.1133970     Document Type: Conference Paper
Times cited : (7)

References (25)
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    • D. Burger and T. M. Austin. The simplescalar tool set version 2.0. Technical Report 1342, Department of Computer Sciences, University of Wisconsin-Madison, June 1997
    • D. Burger and T. M. Austin. The simplescalar tool set version 2.0. Technical Report 1342, Department of Computer Sciences, University of Wisconsin-Madison, June 1997.
  • 6
    • 0034844928 scopus 로고    scopus 로고
    • R. Desikan, D. Burger, and S. W. Keckler. Measuring experimental error in microprocessor simulation. In Proceedings of the 28th Annual International Symposium on Computer Architecture, pages 266-277, July 2001.
    • R. Desikan, D. Burger, and S. W. Keckler. Measuring experimental error in microprocessor simulation. In Proceedings of the 28th Annual International Symposium on Computer Architecture, pages 266-277, July 2001.
  • 7
    • 0038507670 scopus 로고    scopus 로고
    • The C-Breeze compiler infrastructure
    • 01-43, Dept. of Computer Sciences, University of Texas at Austin, November
    • S. Z. Guyer, D. A. Jiménez, and C. Lin. The C-Breeze compiler infrastructure. Technical Report TR 01-43, Dept. of Computer Sciences, University of Texas at Austin, November 2001.
    • (2001) Technical Report TR
    • Guyer, S.Z.1    Jiménez, D.A.2    Lin, C.3
  • 9
    • 0024173488 scopus 로고
    • A case for direct-mapped caches
    • Dec
    • M. D. Hill. A case for direct-mapped caches. IEEE Computer, 21(12):25-40, Dec. 1988.
    • (1988) IEEE Computer , vol.21 , Issue.12 , pp. 25-40
    • Hill, M.D.1
  • 12
    • 0028517833 scopus 로고
    • Cache profiling and the SPEC benchmarks: A case study
    • Oct
    • A. R. Lebeck and D. A. Wood. Cache profiling and the SPEC benchmarks: A case study. IEEE Computer, pages 15-26, Oct. 1994.
    • (1994) IEEE Computer , pp. 15-26
    • Lebeck, A.R.1    Wood, D.A.2
  • 22
    • 0042028057 scopus 로고
    • Second bibliography on cache memories
    • June
    • A. J. Smith. Second bibliography on cache memories. Computer Architecture News, 19(4): 154-182, June 1991.
    • (1991) Computer Architecture News , vol.19 , Issue.4 , pp. 154-182
    • Smith, A.J.1
  • 23
    • 0024013595 scopus 로고
    • Implementing precise interrupts in pipelined processors
    • J. E. Smith and A. R. Pleszkun. Implementing precise interrupts in pipelined processors. IEEE Trans. Comput., 37(5):562-573, 1988.
    • (1988) IEEE Trans. Comput , vol.37 , Issue.5 , pp. 562-573
    • Smith, J.E.1    Pleszkun, A.R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.