A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip

Proceedings - Design Automation Conference

Volumn , Issue , 2006, Pages 845-848

  Murali, Srinivasan ^a   Atienz, David ^b,c   Benini, Luca ^d   De Michel, Giovanni ^c  

^a STANFORD UNIVERSITY   (United States)

^b UNIVERSIDAD COMPLUTENSE DE MADRID   (Spain)

^c EPFL   (Switzerland)

^d UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

Fault tolerance; Flow control; Multi path; Networks on chip; Re order buffers; Routing; Systems on chip

Indexed keywords

BANDWIDTH; CHIP SCALE PACKAGES; ENERGY EFFICIENCY; FAULT TOLERANCE; FLOW CONTROL; PACKET NETWORKS; ROUTING ALGORITHMS;

NETWORKS ON CHIP; RE-ORDER BUFFERS; SYSTEMS ON CHIP;

INTERCONNECTION NETWORKS;

EID: 34247277804     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1146909.1147124     Document Type: Conference Paper

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