Impact of FD-SOI on deep-Sub-100-nm CMOS LSIs-A view of memory designers-

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2006, Pages 103-104

  Itoh, K ^a   Yamaoka, M ^a   Kawahara, T ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); LOGIC GATES; RANDOM ACCESS STORAGE; SILICON ON INSULATOR TECHNOLOGY; VOLTAGE CONTROL;

LOW-VOLTAGE OPERATIONS; SENSE AMPLIFIERS; VOLTAGE MARGIN;

CMOS INTEGRATED CIRCUITS;

EID: 34247165336     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2006.284455     Document Type: Conference Paper

References (12)