Modeling and experimental verification of high impedance arcing fault in medium voltage networks

IEEE Transactions on Dielectrics and Electrical Insulation

Volumn 14, Issue 2, 2007, Pages 375-383

  Elkalashy, Nagy I ^a   Lehtonen, Matti ^a   Darwish, Hatem A ^b   Izzularab, Mohamed A ^b   Taalab, Abdel Maksoud I ^b  

^a AALTO UNIVERSITY   (Finland)

^b Menoufia University   (Egypt)

Author keywords

Arc simulation; ATP EMTP; Dynamic arc equations; Faults due to leaning trees; High impedance arcing faults

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CONDUCTORS; ELECTRIC IMPEDANCE; FAULT DETECTION; WAVELET TRANSFORMS;

ARC SIMULATION; ARCING FAULTS; ATP/EMTP; DYNAMIC ARC EQUATIONS; FAULTS DUE TO LEANING TREES; HIGH IMPEDANCE ARCING FAULTS; MEDIUM VOLTAGE (MV) NETWORKS;

CIRCUIT THEORY;

EID: 34147148015     PISSN: 10709878     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDEI.2007.344617     Document Type: Article

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