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Volumn 51, Issue 1-2, 2007, Pages 65-75

IBM System z9 eFUSE applications and methodology

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; ELECTROMIGRATION; LOGIC CIRCUITS; NETWORKS (CIRCUITS);

EID: 34147102429     PISSN: 00188646     EISSN: 00188646     Source Type: Journal    
DOI: 10.1147/rd.511.0065     Document Type: Article
Times cited : (9)

References (8)
  • 1
    • 34147122593 scopus 로고    scopus 로고
    • System for Implementing a Column Redundancy Scheme for Arrays with Controls that Span Multiple Data Bits,
    • U.S. Patent 6,584,023, June 24
    • P. Bunce, J. Davis, T. Knips, and D. Plass, "System for Implementing a Column Redundancy Scheme for Arrays with Controls that Span Multiple Data Bits," U.S. Patent 6,584,023, June 24, 2003.
    • (2003)
    • Bunce, P.1    Davis, J.2    Knips, T.3    Plass, D.4
  • 3
    • 0036714040 scopus 로고    scopus 로고
    • Electrically Programmable Fuse (eFUSE) Using Electromigration in Silicides
    • C. Kothandaraman, S. K. Iyer, and S. S. Iyer, "Electrically Programmable Fuse (eFUSE) Using Electromigration in Silicides," IEEE Electron Device Lett. 23, No. 9, 523-525 (2002).
    • (2002) IEEE Electron Device Lett , vol.23 , Issue.9 , pp. 523-525
    • Kothandaraman, C.1    Iyer, S.K.2    Iyer, S.S.3
  • 4
    • 10044286895 scopus 로고    scopus 로고
    • The Impact of PMOST Bias-Temperature Degradation on Logic Circuit Reliability Performance
    • Y. Lee, S. Jacobs, S. Stader, N. Mielke, and R. Nachman, "The Impact of PMOST Bias-Temperature Degradation on Logic Circuit Reliability Performance," Microelectron. Reliabil. 45, 107-114 (2005).
    • (2005) Microelectron. Reliabil , vol.45 , pp. 107-114
    • Lee, Y.1    Jacobs, S.2    Stader, S.3    Mielke, N.4    Nachman, R.5
  • 5
    • 34147108338 scopus 로고    scopus 로고
    • D. M. Berger, J. Y. Chen, F. D. Ferraiolo, J. A. Magee, and G. A. Van Huben, High-Speed Source-Synchronous Interface for the IBM System z9 Processor, IBM J. Res. & Dev. 51, No. 1/2, 53-64 (2007, this issue).
    • D. M. Berger, J. Y. Chen, F. D. Ferraiolo, J. A. Magee, and G. A. Van Huben, "High-Speed Source-Synchronous Interface for the IBM System z9 Processor," IBM J. Res. & Dev. 51, No. 1/2, 53-64 (2007, this issue).


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.