Real-time scheduling in heterogeneous dual-core architectures

Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS

Volumn 2, Issue , 2006, Pages 91-96

  Kim, Kwangsik ^a   Kim, Dohun ^a   Park, Chanik ^a  

^a Pohang University of Science and Technology (POSTECH)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DISTRIBUTED PRIORITY CEILING PROTOCOL (DPCP); HETEROGENEOUS DUAL CORE ARCHITECTURES; HIGH PERFORMANCE; REAL TIME SCHEDULING;

COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; DISTRIBUTED COMPUTER SYSTEMS; EMBEDDED SYSTEMS; MATHEMATICAL MODELS; NETWORK PROTOCOLS;

REAL TIME SYSTEMS;

EID: 34047237673     PISSN: 15219097     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPADS.2006.90     Document Type: Conference Paper

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