A design flow for configurable embedded processors based on optimized instruction set extension synthesis

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Leupers, R ^a   Karuri, K ^a   Kraemer, S ^a   Pandey, M ^a  

^a RWTH AACHEN UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED SOFTWARE ENGINEERING; EMBEDDED SYSTEMS; SYSTEMS ANALYSIS;

APPLICATION SPECIFIC INSTRUCTION SET PROCESSORS (ASIP); DESIGN FLOW; EMBEDDED PROCESSORS; EXTENSION SYNTHESIS; INSTRUCTION SET EXTENSION (ISE);

PROGRAM PROCESSORS;

EID: 34047130293     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.243972     Document Type: Conference Paper

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