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Volumn , Issue , 2006, Pages 4959-4962

3D integrated sensors in silicon-on-sapphire CMOS

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITIVE COUPLING; MULTI-CHIP SENSOR; SENSOR MODULE;

EID: 34047106919     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (14)
  • 1
    • 34547291728 scopus 로고    scopus 로고
    • Various authors, 3D nanoelectronic computer architecture and implementation., D. Crawley, K. Nikolic, and M. Forshaw, Eds. Institute of Physics, 2005.
    • Various authors, 3D nanoelectronic computer architecture and implementation., D. Crawley, K. Nikolic, and M. Forshaw, Eds. Institute of Physics, 2005.
  • 4
    • 0038236501 scopus 로고    scopus 로고
    • Three-dimensional integration: Technology, use, and issues for mixed-signal applications
    • March
    • X. Lei, C. C. Liu, H. S. Kim, S. K. Kim, and S. Tiwari, "Three-dimensional integration: technology, use, and issues for mixed-signal applications," IEEE Transactions on Electron Devices, vol. 50, pp. 601-609, March 2003.
    • (2003) IEEE Transactions on Electron Devices , vol.50 , pp. 601-609
    • Lei, X.1    Liu, C.C.2    Kim, H.S.3    Kim, S.K.4    Tiwari, S.5
  • 6
    • 0029214569 scopus 로고    scopus 로고
    • D. Saltzman, T. K. Jr., and P. Franzon, Application of capacitive coupling to switch fabrics, in IEEE Multi-Chip Module Conference, January 1995, pp. 195-199.
    • D. Saltzman, T. K. Jr., and P. Franzon, "Application of capacitive coupling to switch fabrics," in IEEE Multi-Chip Module Conference, January 1995, pp. 195-199.
  • 7
    • 0031104164 scopus 로고    scopus 로고
    • Capacitive coupling and quantized feedback applied to conventional CMOS technology
    • March
    • T. J. Gabara and W. C. Fischer, "Capacitive coupling and quantized feedback applied to conventional CMOS technology," IEEE Journal of Solid-State Circuits, vol. 32, pp, 419-427, March 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , pp. 419-427
    • Gabara, T.J.1    Fischer, W.C.2
  • 11
    • 0034464356 scopus 로고    scopus 로고
    • Low power digital CMOS buffer systems for driving highly capacitive interconnect lines
    • August
    • R. M.Secareanu and E. G. Friedman, "Low power digital CMOS buffer systems for driving highly capacitive interconnect lines," in IEEE Midwest Symposium on Circuits and Systems, vol. 1, August 2000, pp. 362-365.
    • (2000) IEEE Midwest Symposium on Circuits and Systems , vol.1 , pp. 362-365
    • Secareanu, R.M.1    Friedman, E.G.2
  • 12
    • 19944370806 scopus 로고    scopus 로고
    • An isolation charge pump fabricated in silicon on sapphire CMOS technology
    • May
    • E. Culurciello, P. Pouliquen, and A. Andreou, "An isolation charge pump fabricated in silicon on sapphire CMOS technology," IEE Electronics Letters, Vol. 41, no. 10, pp. 590-592, May 2005.
    • (2005) IEE Electronics Letters , vol.41 , Issue.10 , pp. 590-592
    • Culurciello, E.1    Pouliquen, P.2    Andreou, A.3
  • 13
    • 33751547785 scopus 로고    scopus 로고
    • 52nd ed, Peregrine Semiconductor Inc, San Diego, CA, March
    • Peregrine; 0.5um FC Design Manual, 52nd ed., Peregrine Semiconductor Inc., San Diego, CA, March 2005, http://www.peregrine-semi.com/.
    • (2005) 0.5um FC Design Manual
    • Peregrine1
  • 14
    • 0016961262 scopus 로고
    • On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique
    • June
    • J. Dickson, "On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique," IEEE Journal Of Solid-State Circuits, vol. 11, no. 6, pp. 374-378, June 1976.
    • (1976) IEEE Journal Of Solid-State Circuits , vol.11 , Issue.6 , pp. 374-378
    • Dickson, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.