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Volumn 49, Issue 1, 2007, Pages 182-191
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EMC assessment at chip and PCB level: Use of the ICEM model for jitter analysis in an integrated PLL
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Author keywords
Application specific integrated circuit (ASIC); Decoupling; Integrated circuit electromagnetic model (ICEM); Jitter; Modeling; Phase locked loop (PLL); Prediction; Simulation
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Indexed keywords
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
ELECTROMAGNETIC WAVE EMISSION;
JITTER;
MATHEMATICAL MODELS;
PHASE LOCKED LOOPS;
PRINTED CIRCUIT BOARDS;
AUTROCOMPATIBILITY;
DECOUPLING;
INTEGRATED CIRCUIT ELECTROMAGNETIC MODEL;
ELECTROMAGNETIC COMPATIBILITY;
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EID: 33947603901
PISSN: 00189375
EISSN: None
Source Type: Journal
DOI: 10.1109/TEMC.2006.888181 Document Type: Article |
Times cited : (39)
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References (6)
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