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Volumn 54, Issue 2, 2007, Pages 268-279

The analysis and improvement of a current-steering DAC's dynamic SFDR - II: The output-dependent delay differences

Author keywords

Current steering digital to analog converters (DACs); Glitch; Output variation; Output dependent delay difference (ODDD); Spurious free dynamic range (SFDR)

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CONVERTERS; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; MATHEMATICAL MODELS;

EID: 33947392592     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2006.887598     Document Type: Article
Times cited : (43)

References (14)
  • 1
    • 0348233277 scopus 로고    scopus 로고
    • "A 1.5-V 14-bit 100-MS/s self-calibrated DAC"
    • Dec
    • Y. Cong and R. Geiger, "A 1.5-V 14-bit 100-MS/s self-calibrated DAC," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2051-2060, Dec. 2003.
    • (2003) IEEE J. Solid-State Circuits , vol.38 , Issue.12 , pp. 2051-2060
    • Cong, Y.1    Geiger, R.2
  • 2
    • 31444447742 scopus 로고    scopus 로고
    • "The analysis and improvement of a current-steering DACs dynamic SFDR - I: The cell-dependent delay differences"
    • Jan
    • T. Chen and G. G. E. Gielen, "The analysis and improvement of a current-steering DACs dynamic SFDR - I: The cell-dependent delay differences," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 1, pp. 3-15, Jan. 2006.
    • (2006) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.53 , Issue.1 , pp. 3-15
    • Chen, T.1    Gielen, G.G.E.2
  • 6
    • 0037812857 scopus 로고    scopus 로고
    • "Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters"
    • in May
    • T. Chen and G. Gielen, "Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS'03), May 2003, pp. I-973-I-976.
    • (2003) Proc. IEEE Int. Symp. Circuits Syst. (ISCAS'03) , pp. 973-976
    • Chen, T.1    Gielen, G.2
  • 7
    • 0003994354 scopus 로고    scopus 로고
    • "Characterization of MOS transistor mismatch for analog design"
    • Ph.D. dissertation, ESAT-MICAS, Katholieke Univ. Leuven, Leuven, Belgium
    • J. Bastos, "Characterization of MOS transistor mismatch for analog design," Ph.D. dissertation, ESAT-MICAS, Katholieke Univ. Leuven, Leuven, Belgium, 1998.
    • (1998)
    • Bastos, J.1
  • 10
    • 0034479476 scopus 로고    scopus 로고
    • "A self-trimmmg 14-b 100-MS/s CMOS DAC"
    • A. R. Bugeja and B. Song, "A self-trimmmg 14-b 100-MS/s CMOS DAC," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1841-1852, 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.12 , pp. 1841-1852
    • Bugeja, A.R.1    Song, B.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.