Techniques for random masking in hardware

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 54, Issue 2, 2007, Pages 291-300

  Golic, Jovan Dj ^a  

^a TELECOM ITALIA   (Italy)

Author keywords

Arithmetic circuits; Boolean functions; Cryptography; Digital circuits; Logic circuits; Power analysis; Random masking; Side channel attacks

Indexed keywords

BOOLEAN FUNCTIONS; DIGITAL ARITHMETIC; DIGITAL CIRCUITS; LOGIC CIRCUITS; LOGIC GATES; RANDOM PROCESSES;

ADVANCED ENCRYPTION STANDARD (AES); LOGIC OPERATION; RANDOM MASKING;

CRYPTOGRAPHY;

EID: 33947382250     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2006.885974     Document Type: Article

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