On-chip solar battery structure for CMOS LSI

IEICE Electronics Express

Volumn 3, Issue 13, 2006, Pages 287-291

  Arima, Yutaka ^a   Ehara, Masaya ^a  

^a KYUSHU INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

CMOS; On chip; Self powered system; Solar battery

Indexed keywords

EID: 33947376038     PISSN: None     EISSN: 13492543     Source Type: Journal    
DOI: 10.1587/elex.3.287     Document Type: Article

References (5)

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2. Y. Yoshida, F. Utsunomiya, and T. Douseki, "Sub-1-V Power-Supply System with Variable-Stage SC-Type DC-DC Converter Scheme for Ambient Energy Sources," IEICE Trans. Electron., vol. E88-C, no. 4 pp. 484-489, April 2005.
3. J. Nanjo, K. A. H. Mostafa, K. Takada, Y. Kobayashi, T. Miyazaki, and S. Nomura, "Si MIS Solar Cells by Anodization," IEICE Trans. Electron., vol. E76-C, no. 1, pp. 136-141, Jan. 1993.
4. T. Douseki, M. Yonemaru, E. Ikuta, A. Matsuzawa, A. Kameyama, S. Baba, and T. Mogami, "Ultra low-Voltage MTCMOS/SOI Circuits for Battery less Mobile System," IEICE Trans. Electron., vol. E87-C, no. 4, pp. 437-447, April 2004.
5. K. Itoh, A. R. Fridi, A. Bellaouar, and M. I. Elmasry, "A Deep Sub-V, Single Power-Supply SRAM cell with Multi-Vt, Boosted Storage node and Dynamic Load," 1996 Symp. VLSI.