A scheme for mapping tolerance specifications to generalized deviation space for use in tolerance synthesis and analysis

IEEE Transactions on Automation Science and Engineering

Volumn 3, Issue 1, 2006, Pages 81-90

  Wang, Haoyu ^b   Pramanik, Nilmani ^c   Roy, Utpal ^d   Sudarsan, Rachuri ^e,f   Sriram, Ram D ^a,f   Lyons, Kevin W ^f,g  

^a IEEE   (United States)

^b BOWLING GREEN STATE UNIVERSITY   (United States)

^c UNIVERSITY OF NORTHERN IOWA   (United States)

^d Syracuse University   (United States)

^e George Washington University   (United States)

^f NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^g NATIONAL SCIENCE FOUNDATION   (United States)

Author keywords

Deviation space; Mapping; Tolerance analysis; Tolerance synthesis

Indexed keywords

DEVIATION SPACE; LEAST MATERIAL CONDITION (LMC); MAXIMUM MATERIAL CONDITION (MMC); TOLERANCE ANALYSIS; TOLERANCE SYNTHESIS;

CONSTRAINT THEORY; CONTROL SYSTEM SYNTHESIS; MAPPING; PARAMETER ESTIMATION; SPECIFICATIONS;

FITS AND TOLERANCES;

EID: 33947118160     PISSN: 15455955     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASE.2005.853583     Document Type: Article

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