An open-source tool for systemc to verilog automatic translation

Latin American Applied Research

Volumn 37, Issue 1, 2007, Pages 53-58

  Castillo, J ^a   Huerta, P ^a   Martinez J I ^a  

^a UNIVERSIDAD REY JUAN CARLOS   (Spain)

Author keywords

SystemC; Translation; Verilog

Indexed keywords

EID: 33947099077     PISSN: 03270793     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (14)

1. Castillo, J., P. Huerta and J.I. Martinez, "SystemC Design Flow for a DES/AES CryptoProcessor", In WSEAS Transactions on Information Science and Applications, Athens, 1, 193-198 (2004).
2. Celoxica, "Handel-C Language Reference Manual", (2005)
3. Chiodo, M., P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno and A. Sangiovanni-Vincentelli, "Hardware-Software Codesign of Embedded Systems". In IEEE Micro, 26-36, August (1994)
4. Forte, "Cynthesizer Datasheet" http://www.forteds.com/products/ cynthesizer_datasheet.pdf (2004)
5. Levine, J., T. Mason and D. Brown, "Lex & Yacc, Second Edition", Oreilly (1992)
6. OSCI, "SystemC 2.1", http://www.systemc.org. (2002)
7. Pellerin, D. and S. Thibault, "Practical FPGA Programming in C", Prentice-Hall (2002)
8. SCV, "SystemC Verification Standard Specification" (2002)
9. Semiconductor Industry Association, "International Technology Roadmap for Semiconductors", http://public.itrs.net/Files/2001ITRS/home. htm, (2001)
10. Synopsys, "Cocentric System Studio Datasheet", http://www.synopsys.com/products/cocentric_studio/cocentric_studio.html (2006)
11. Synopsys, "Describing Synthesizable RTL in SystemC" (2002)
12. Tkacik, T., "A hardware random generator". In Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2002, LNCS 2523, 450-452, USA (2002)
13. Xilinx, "Xilinx System Generator for v.8.1 User Guide" (2006)
14. Yuri, E., J. Tatsuda, N. Khan and C. Dietrich, "Transaction- based simulation using SystemC/SCV", http://www.eetasia.com/ (2005)