Demonstration of recessed SiGe S/D and inserted metal gate on HfO 2 for high performance pFETs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 886-889

  Verheyen, P ^a   Eneman, G ^a,b   Rooyackers, R ^a   Loo, R ^a   Eeckhout, L ^a   Rondas, D ^a   Leys, F ^a   Snow, J ^a   Shamiryan, D ^a   Demand, M ^a   Huffman, Th Y ^a   Goodwin, M ^c   Fujimoto, H ^a,c,d   Ravit, C ^a,e   Lee, B C ^a,c   Caymax, M ^a   De Meyer, K ^a,b   Absil, P ^a   Jurczak, M ^a   Biesemans, S ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c TI Assignee to Imec ^*

^d Matsushita Assignee to Imec   (Japan)

^e PHILIPS RESEARCH LABORATORIES   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

GATE STACKS; STRAIN MECHANISMS; STRESSORS;

ETCHING; GATE DIELECTRICS; SILICON COMPOUNDS; TITANIUM NITRIDE;

GATES (TRANSISTOR);

EID: 33847763210     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. T.Ghani et al., IEDM, pp. 978-980, 2003.
2. P.R. Chidambaram et al., VLSI, pp. 48-49, 2004.
3. F. Nouri et al, IEDM, pp. 1055-1058, 2004.
4. G. Eneman et al, VLSI, pp. 22-23 2005.
5. P. Verheyen et al, VLSI, pp. 194-195, 2005.