Analysis and implications of IC cooling for deep nanometer scale CMOS technologies

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 1018-1021

  Lin, Sheng Chih ^a   Mahajan, Ravi ^b   De, Vivek ^b   Banerjee, Kaustav ^a  

^a Santa Barbara   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP COOLING; DIE TEMPERATURE; ELECTROTHERMAL COUPLINGS; OPERATING FREQUENCY;

COOLING; INTEGRATED CIRCUIT TESTING; MICROPROCESSOR CHIPS; SILICON ON INSULATOR TECHNOLOGY; THERMAL GRADIENTS;

CMOS INTEGRATED CIRCUITS;

EID: 33847759053     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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