A new compact model for junctions in advanced CMOS technologies

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 200-203

  Scholten, A J ^a   Smit, G D J ^a   Durand, M ^a   Van Langevelde, R ^a   Dachs, C J J ^a   Klaassen, D B M ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; ELECTRON TRAPS; ELECTRON TUNNELING; LEAKAGE CURRENTS;

BAND TO BAND TUNNELING; DEEP SUBMICRON CMOS TECHNOLOGIES; TRAP ASSISTED TUNNELING;

SEMICONDUCTOR JUNCTIONS;

EID: 33847737772     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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