A 65nm NOR flash technology with 0.042μm2 cell size for high performance multilevel application

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 849-852

  Servalli, G ^a   Brazzelli, D ^a   Camerlenghi, E ^a   Capetti, G ^a   Costantini, S ^a   Cupeta, C ^a   DeSimone, D ^a   Ghetti, A ^a   Ghilardi, T ^a   Gulli, P ^a   Mariani, M ^a   Pavan, A ^a   Somaschini, R ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER CONCENTRATION; CMOS INTEGRATED CIRCUITS; COBALT COMPOUNDS; FLASH MEMORY; LITHOGRAPHY; METALLIZING; NANOTECHNOLOGY;

COBALT SALICIDE; COPPER METALLIZATION; FLOATING GATE; NOR FLASH TECHNOLOGY;

LOGIC GATES;

EID: 33847733949     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. 2 Cell Size", 2004 Symposium on VLSI Technology, pag. 238-239
2. A.Fazio, "A High Density High Performance 180nm Generation Etox™ Flash Memory Technology", IEEE IEDM Tech. Dig., 1999, pag. 267-270
3. st ICMTD, 2005, pag. 154-160