Fast passivity verification and enforcement via reciprocal systems for interconnects with large order macromodels

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 1, 2007, Pages 48-59

  Saraswat, Dharmendra ^a,b   Achar, Ramachandra ^a,b   Nakhla, Michel S ^a,b  

^a IEEE   (Canada)

^b CARLETON UNIVERSITY   (Canada)

Author keywords

Analog simulation and modeling; High frequency modules; Passive macromodels; Scattering parameters; Signal integrity; Tabulated data; VLSI interconnects; VLSI packages

Indexed keywords

ANALOG SIMULATION; HIGH FREQUENCY MODULES; MACROMODELING; SIGNAL INTEGRITY; VLSI INTERCONNECTS;

ALGORITHMS; CHIP SCALE PACKAGES; CIRCUIT SIMULATION; INTERCONNECTION NETWORKS; SCATTERING PARAMETERS; VLSI CIRCUITS;

INTEGRATED CIRCUIT LAYOUT;

EID: 33847733591     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.891085     Document Type: Article

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