Damage-free neutral beam etching technology for high mobility FinFETs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 840-843

  Endo, Kazuhiko ^a   Noda, Shuichi ^b   Masahara, Meishoku ^a   Kubota, Tomohiro ^b   Ozaki, Takuya ^b   Samukawa, Seiji ^b   Liu, Yongxun ^a   Ishii, Kenichi ^a   Ishikawa, Yuki ^a   Sugimata, Etsuro ^a   Matsukawa, Takashi ^a   Takashima, Hidenori ^a   Yamauchi, Hiromi ^a   Suzuki, Eiichi ^a  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^b TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRON MOBILITY; ETCHING; INTEGRATED CIRCUIT MANUFACTURE;

CMOS FABRICATION; DEVICE PERFORMANCE; FINFET DEVICES; NEUTRAL BEAM ETCHING;

FIELD EFFECT TRANSISTORS;

EID: 33847704888     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. T. Sekigawa et al., Solid State Electron. 27 (1984) 827.
2. M. Masahara et al., IEDM Tech. Digest 2002. p. 949.
3. Y. X. Liu et al., IEDM Tech. Digest 2003, p. 986.
4. G. S. Oehrlein et al., Appl. Phys. Lett. 45 (1984) 420.
5. C.J.Petti et al., IEDM Tech. Digest 1988, p. 104.
6. S. Samukawa et al., J. Vac. Sci. Technol. A 20 (2002) 1566.
7. S. Noda et al., J. Vac. Sci. Technol. A 22 (2004) 1506.
8. H. Irie et al., IEDM Tech. Digest 2004, p. 225.