High performance, sub-50nm MOSFETS for mixed signal applications

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 204-207

  Dimitrov, V ^a   Heng, J B ^a   Timp, K ^a   Dimauro, O ^a   Chan, R ^a   Feng, J ^a   Hafez, W ^a   Sorsch, T ^b   Mansfield, W ^b   Miner, J ^b   Kornblit, A ^b   Klemens, F ^b   Bower, J ^b   Cirelli, R ^b   Ferry, E ^b   Taylor, A ^b   Feng, M ^a   Timp, G ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b New Jersey Nanotechnology Consortium   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GATE LENGTH; MIXED SIGNAL APPLICATIONS; SUPER HIGH FREQUENCY (SHF) BAND;

BAND STRUCTURE; CMOS INTEGRATED CIRCUITS; GATES (TRANSISTOR); SIGNAL PROCESSING;

MOSFET DEVICES;

EID: 33847700489     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. K. Kuhn, et al., VLSI Tech. Symp. Tech Digest (2004), pp. 224.
2. Y.P. Tsividis, "Operation and Modeling of the MOS Transistor," McGraw-Hill, 1992.
3. C. Enz, IEEE Trans. Microwave Theory Tech., 50(1), 2002, pp. 342-358.
4. D. Cho, S. Kang, K. Kim, S.Lee, IEEE TED, 42(3), 1995, pp. 540-548.
5. B. Razavi, R. Yan and K.F. Lee, IEEE Trans Circuit Systems-I: Fund. Theory Appl., 41(11) 1994, pp. 750-754.