Storage array and sense/refresh circuit for single-transistor memory cells

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1972, Pages 56-57

  Stein, K U ^a   Sihling, A ^a   Doering, E ^a  

^a SIEMENS AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CELLS; CYTOLOGY; SEMICONDUCTOR STORAGE; TIMING CIRCUITS; TRANSISTORS;

MEMORY CELL; SINGLE TRANSISTORS; STATIC MEMORY CELLS; STORAGE ARRAYS; STORAGE DENSITIES;

RANDOM ACCESS STORAGE;

EID: 33847511876     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.1972.1155066     Document Type: Conference Paper

References (2)

1. Cohen, L., Green, R., Smith, K., and Seely, J. L., "Single Transistor Cell Makes Room for More Memory on an MOS Chip", Electronics, p. 69; Aug., 1971.
2. Grove, A. S., and Fitzgerald, D. J., "Surface Effects on P-N Junctions-Characteristics of Surface Space-Charge Regions under Non-Equilibrium Conditions", Solid-State Electronics, 9, p. 783; Sept., 1966.