A case study of performing OFDM kernels on a novel reconfigurable DSP architecture

Proceedings - IEEE Military Communications Conference MILCOM

Volumn 2005, Issue , 2005, Pages

  Niktash, Afshin ^a   Maestre, Rafael ^a   Bagherzadeh, Nader ^a  

^a Morpho Technologies   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONALLY INTENSIVE KERNELS; JTRS PROGRAMS; REAL-TIME BASEBAND PROCESSING;

DIGITAL SIGNAL PROCESSING; MILITARY COMMUNICATIONS; PARALLEL PROCESSING SYSTEMS; PROBLEM SOLVING; REAL TIME SYSTEMS; STANDARDS; WIRELESS TELECOMMUNICATION SYSTEMS;

ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING;

EID: 33847380684     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MILCOM.2005.1605936     Document Type: Conference Paper

References (6)

1. W. H. Mangione-Smith et al., "Seeking Solutions in Configurable Computing," IEEE Computer, Dec. 1997, pp. 38-43
2. IEEE Std 802.1 la-1999
3. A. J. Viterbi, "Error bounds for convolutional coding and an asymptotically optimum decoding algorithm," IEEE Trans. Information Theory, vol. IT-13, pp. 260-269, April 1967.
4. G. Fettweis, H. Meyr, "A Modular Variable Speed Viterbi Decoding Implementation for High Data Rates," North-Holland Signal Processing IV, Proc. EUSIPCO '88, pp.339-342, 1988
5. G. Fettweis, H. Meyr, "High-Speed Parallel Viterbi Decoding: Algorithm and VLSI Architecture," IEEE Communication Magazine, pp. 46-55, May. 1991
6. G. Fettweis, H. Meyr, "Feedforward Architectures for parallel Viterbi Decoding," Kluwer J. on VLSI signal processing, No. 3 pp. 105-119, 1991.