A bit scalable architecture for fuzzy processors with three inputs and a flexible fuzzification unit

Proceedings - 13th Symposium on Integrated Circuits and Systems Design

Volumn , Issue , 2000, Pages 29-34

  D'Amore, R ^a  

^a INSTITUTO TECNOLÓGICO DE AERONÁUTICA   (Brazil)

Author keywords

Circuit synthesis; Fuzzy sets; Shape

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; FUZZY SETS; INTEGRATED CIRCUITS; KNOWLEDGE BASED SYSTEMS; MEMBERSHIP FUNCTIONS; SYNTHESIS (CHEMICAL); SYSTEMS ANALYSIS;

CIRCUIT DESCRIPTION; CIRCUIT SYNTHESIS; CONTROL STRATEGIES; FUNCTIONAL UNITS; FUZZY PROCESSOR; SCALABLE ARCHITECTURES; SHAPE; VHDL DESCRIPTION;

COMPUTER ARCHITECTURE;

EID: 33847205728     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2000.876004     Document Type: Conference Paper

References (7)

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2. R. d'Amore, O. Saotome, K. H. Kienitz. "Automatic Synthesis of Membership Functions Generators for Fuzzy Logic". Proc. XII SBMicro, Brazil, 1998. pp 95-101.
3. R. L. Graham, D. E. Knuth, O. Patashnik, "Concrete Mathematics", Addison Wesley, 1989.
4. R. d'Amore, K. H. Kienitz, O. Saotome, "A Bit Scalable Architecture for Fuzzy Processors", Proc. SBCCI99, Brazil, 1999, pp. 8-11.
5. Mentor Graphics, Package Power 2.2, LeonardoSpectrum 1999.1f, Version 2.2.
6. Altera, "FLEX 10K Embedded Program. Logic Family". Altera Corporation, USA.
7. C. Altrock, "Towards Fuzzy Logic Standardization", Proc. of Fifth IEEE Int. Conf. on Fuzzy System, 1996.